Merge branch 'master' into plic_uart_v1plic_uart_v1

1 files changed, 3 insertions, 11 deletions

diff --git a/fesvr/htif.h b/fesvr/htif.h
index 3cee25f..5767e31 100644
--- a/fesvr/htif.h
+++ b/fesvr/htif.h
@@ -26,31 +26,23 @@ class htif_t : public chunked_memif_t
   int run();
   bool done();
   int exit_code();
-
+  void set_expected_xlen(unsigned int m) { expected_xlen = m; }
   virtual memif_t& memif() { return mem; }
 
   template<typename T> inline T from_target(target_endian<T> n) const
   {
-#ifdef RISCV_ENABLE_DUAL_ENDIAN
     memif_endianness_t endianness = get_target_endianness();
     assert(endianness == memif_endianness_little || endianness == memif_endianness_big);
 
     return endianness == memif_endianness_big? n.from_be() : n.from_le();
-#else
-    return n.from_le();
-#endif
   }
 
   template<typename T> inline target_endian<T> to_target(T n) const
   {
-#ifdef RISCV_ENABLE_DUAL_ENDIAN
     memif_endianness_t endianness = get_target_endianness();
     assert(endianness == memif_endianness_little || endianness == memif_endianness_big);
 
     return endianness == memif_endianness_big? target_endian<T>::to_be(n) : target_endian<T>::to_le(n);
-#else
-    return target_endian<T>::to_le(n);
-#endif
   }
 
  protected:
@@ -73,7 +65,7 @@ class htif_t : public chunked_memif_t
 
   // indicates that the initial program load can skip writing this address
   // range to memory, because it has already been loaded through a sideband
-  virtual bool is_address_preloaded(addr_t taddr, size_t len) { return false; }
+  virtual bool is_address_preloaded(addr_t, size_t) { return false; }
 
   // Given an address, return symbol from addr2symbol map
   const char* get_symbol(uint64_t addr);
@@ -82,7 +74,7 @@ class htif_t : public chunked_memif_t
   void parse_arguments(int argc, char ** argv);
   void register_devices();
   void usage(const char * program_name);
-
+  unsigned int expected_xlen = 0;
   memif_t mem;
   reg_t entry;
   bool writezeros;