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| author | Tim Newsome <tim@sifive.com> | 2019-07-16 13:29:45 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-07-22 02:11:03 -0700 |
| commit | cf482745a833428fef10bbbf8376c9c092727458 (patch) | |
| tree | b717fbe8a007b9f844e1c3c06486d19b696dacb6 /debug_rom | |
| parent | 98b4b07cb428eb0be1c96e857ab52b68a30c9f2e (diff) | |
| download | spike-cf482745a833428fef10bbbf8376c9c092727458.zip spike-cf482745a833428fef10bbbf8376c9c092727458.tar.gz spike-cf482745a833428fef10bbbf8376c9c092727458.tar.bz2 | |
Writing non-existent CSRs, access FPRs with mstatus.FS=0 (#311)
* Don't corrupt s0 when abstract CSR write fails.
* Support abstract FPR access then mstatus.FS=0
Discussion on the spec list leans towards this being a requirement.
Certainly users want their debugger to be able to access all registers
regardless of target state.
Diffstat (limited to 'debug_rom')
| -rwxr-xr-x | debug_rom/debug_rom.S | 4 | ||||
| -rw-r--r-- | debug_rom/debug_rom.h | 18 |
2 files changed, 13 insertions, 9 deletions
diff --git a/debug_rom/debug_rom.S b/debug_rom/debug_rom.S index 03df533..8d8e4cd 100755 --- a/debug_rom/debug_rom.S +++ b/debug_rom/debug_rom.S @@ -43,6 +43,10 @@ entry_loop: jal zero, entry_loop _exception: + // Restore S0, which we always save to dscratch. + // We need this in case the user tried an abstract write to a + // non-existent CSR. + csrr s0, CSR_DSCRATCH sw zero, DEBUG_ROM_EXCEPTION(zero) // Let debug module know you got an exception. ebreak diff --git a/debug_rom/debug_rom.h b/debug_rom/debug_rom.h index 3fa018a..7edd5f6 100644 --- a/debug_rom/debug_rom.h +++ b/debug_rom/debug_rom.h @@ -1,13 +1,13 @@ static const unsigned char debug_rom_raw[] = { - 0x6f, 0x00, 0xc0, 0x00, 0x6f, 0x00, 0xc0, 0x05, 0x6f, 0x00, 0x80, 0x03, + 0x6f, 0x00, 0xc0, 0x00, 0x6f, 0x00, 0x00, 0x06, 0x6f, 0x00, 0x80, 0x03, 0x0f, 0x00, 0xf0, 0x0f, 0x73, 0x10, 0x24, 0x7b, 0x73, 0x24, 0x40, 0xf1, 0x23, 0x20, 0x80, 0x10, 0x03, 0x44, 0x04, 0x40, 0x13, 0x74, 0x14, 0x00, - 0x63, 0x12, 0x04, 0x02, 0x73, 0x24, 0x40, 0xf1, 0x03, 0x44, 0x04, 0x40, - 0x13, 0x74, 0x24, 0x00, 0x63, 0x16, 0x04, 0x02, 0x73, 0x00, 0x50, 0x10, - 0x6f, 0xf0, 0x9f, 0xfd, 0x23, 0x26, 0x00, 0x10, 0x73, 0x00, 0x10, 0x00, - 0x73, 0x24, 0x40, 0xf1, 0x23, 0x22, 0x80, 0x10, 0x73, 0x24, 0x20, 0x7b, - 0x0f, 0x00, 0xf0, 0x0f, 0x0f, 0x10, 0x00, 0x00, 0x67, 0x00, 0x00, 0x30, - 0x73, 0x24, 0x40, 0xf1, 0x23, 0x24, 0x80, 0x10, 0x73, 0x24, 0x20, 0x7b, - 0x73, 0x00, 0x20, 0x7b + 0x63, 0x14, 0x04, 0x02, 0x73, 0x24, 0x40, 0xf1, 0x03, 0x44, 0x04, 0x40, + 0x13, 0x74, 0x24, 0x00, 0x63, 0x18, 0x04, 0x02, 0x73, 0x00, 0x50, 0x10, + 0x6f, 0xf0, 0x9f, 0xfd, 0x73, 0x24, 0x20, 0x7b, 0x23, 0x26, 0x00, 0x10, + 0x73, 0x00, 0x10, 0x00, 0x73, 0x24, 0x40, 0xf1, 0x23, 0x22, 0x80, 0x10, + 0x73, 0x24, 0x20, 0x7b, 0x0f, 0x00, 0xf0, 0x0f, 0x0f, 0x10, 0x00, 0x00, + 0x67, 0x00, 0x00, 0x30, 0x73, 0x24, 0x40, 0xf1, 0x23, 0x24, 0x80, 0x10, + 0x73, 0x24, 0x20, 0x7b, 0x73, 0x00, 0x20, 0x7b }; -static const unsigned int debug_rom_raw_len = 112; +static const unsigned int debug_rom_raw_len = 116; |