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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2021-02-22 19:59:26 -0800 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2021-02-24 18:40:56 -0800 |
| commit | 12748b501d733f4165a8481b93053cbc93cdc0dd (patch) | |
| tree | a6d048e54d028b39b25ad2b74392c23c7375fa26 /README.md | |
| parent | a9eae3e6290c1c3b2bcfcce1990b5513a69b6f19 (diff) | |
| download | spike-12748b501d733f4165a8481b93053cbc93cdc0dd.zip spike-12748b501d733f4165a8481b93053cbc93cdc0dd.tar.gz spike-12748b501d733f4165a8481b93053cbc93cdc0dd.tar.bz2 | |
rvv: update readme
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'README.md')
| -rw-r--r-- | README.md | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -20,7 +20,7 @@ Spike supports the following RISC-V ISA features: - C extension, v2.0 - B extension, v0.92 - K extension, v0.8.1 ([Scalar Cryptography](https://github.com/riscv/riscv-crypto)) - - V extension, v0.9, w/ Zvlsseg/Zvamo/Zvqmac, w/o Zvediv, (_requires a 64-bit host_) + - V extension, v0.10, w/ Zvlsseg/Zvamo (_requires a 64-bit host_) - Bi-endianness - Conformance to both RVWMO and RVTSO (Spike is sequentially consistent) - Machine, Supervisor, and User modes, v1.11 |