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authorTim Newsome <tim@sifive.com>2018-01-30 12:19:55 -0800
committerTim Newsome <tim@sifive.com>2018-02-19 11:55:12 -0800
commitbb8c45f12eeaeb36ac69991f674d1971d2dc460d (patch)
tree48eb51f69ad862744a672d52d7689f1453b3c748
parentc746388b542eacd2586acfbc0a742b08a5c0bd6f (diff)
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WIP. Doesn't work.
-rw-r--r--riscv/debug_module.cc74
-rw-r--r--riscv/debug_module.h2
2 files changed, 36 insertions, 40 deletions
diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc
index 12956a5..13a330b 100644
--- a/riscv/debug_module.cc
+++ b/riscv/debug_module.cc
@@ -8,7 +8,7 @@
#include "debug_rom/debug_rom.h"
#include "debug_rom/debug_rom_defines.h"
-#if 0
+#if 1
# define D(x) x
#else
# define D(x)
@@ -24,6 +24,10 @@ debug_module_t::debug_module_t(sim_t *sim, unsigned progbufsize, unsigned max_bu
debug_abstract_start(debug_progbuf_start - debug_abstract_size*4),
sim(sim)
{
+ D(fprintf(stderr, "debug_data_start=0x%x\n", debug_data_start));
+ D(fprintf(stderr, "debug_progbuf_start=0x%x\n", debug_progbuf_start));
+ D(fprintf(stderr, "debug_abstract_start=0x%x\n", debug_abstract_start));
+
program_buffer = new uint8_t[program_buffer_bytes];
memset(halted, 0, sizeof(halted));
@@ -478,6 +482,8 @@ bool debug_module_t::perform_abstract_command()
return true;
}
+ D(fprintf(stderr, ">>> perform_abstract_command(0x%x)\n", command));
+
if ((command >> 24) == 0) {
// register access
unsigned size = get_field(command, AC_ACCESS_REGISTER_SIZE);
@@ -491,49 +497,39 @@ bool debug_module_t::perform_abstract_command()
if (get_field(command, AC_ACCESS_REGISTER_TRANSFER)) {
- if (regno < 0x1000 || regno >= 0x1020) {
- abstractcs.cmderr = CMDERR_NOTSUP;
- return true;
- }
-
- unsigned regnum = regno - 0x1000;
+ if (regno >= 0x1000 && regno < 0x1020) {
+ unsigned regnum = regno - 0x1000;
+
+ switch (size) {
+ case 2:
+ if (write)
+ write32(debug_abstract, 0, lw(regnum, ZERO, debug_data_start));
+ else
+ write32(debug_abstract, 0, sw(regnum, ZERO, debug_data_start));
+ break;
+ case 3:
+ if (write)
+ write32(debug_abstract, 0, ld(regnum, ZERO, debug_data_start));
+ else
+ write32(debug_abstract, 0, sd(regnum, ZERO, debug_data_start));
+ break;
+ default:
+ abstractcs.cmderr = CMDERR_NOTSUP;
+ return true;
+ }
- switch (size) {
- case 2:
- if (write)
- write32(debug_abstract, 0, lw(regnum, ZERO, debug_data_start));
- else
- write32(debug_abstract, 0, sw(regnum, ZERO, debug_data_start));
- break;
- case 3:
- if (write)
- write32(debug_abstract, 0, ld(regnum, ZERO, debug_data_start));
- else
- write32(debug_abstract, 0, sd(regnum, ZERO, debug_data_start));
- break;
- /*
- case 4:
- if (write)
- write32(debug_rom_code, 0, lq(regnum, ZERO, debug_data_start));
- else
- write32(debug_rom_code, 0, sq(regnum, ZERO, debug_data_start));
- break;
- */
- default:
+ } else {
abstractcs.cmderr = CMDERR_NOTSUP;
return true;
}
- } else {
- //NOP
- write32(debug_abstract, 0, addi(ZERO, ZERO, 0));
- }
- if (get_field(command, AC_ACCESS_REGISTER_POSTEXEC)) {
- // Since the next instruction is what we will use, just use nother NOP
- // to get there.
- write32(debug_abstract, 1, addi(ZERO, ZERO, 0));
- } else {
- write32(debug_abstract, 1, ebreak());
+ if (get_field(command, AC_ACCESS_REGISTER_POSTEXEC)) {
+ D(fprintf(stderr, ">>> post-exec!\n"));
+ write32(debug_abstract, 1,
+ jal(ZERO, debug_progbuf_start - debug_abstract_start - 4));
+ } else {
+ write32(debug_abstract, 1, ebreak());
+ }
}
debug_rom_flags[dmcontrol.hartsel] |= 1 << DEBUG_ROM_FLAG_GO;
diff --git a/riscv/debug_module.h b/riscv/debug_module.h
index 36037b4..82c449e 100644
--- a/riscv/debug_module.h
+++ b/riscv/debug_module.h
@@ -100,7 +100,7 @@ class debug_module_t : public abstract_device_t
static const unsigned debug_data_start = 0x380;
unsigned debug_progbuf_start;
- static const unsigned debug_abstract_size = 2;
+ static const unsigned debug_abstract_size = 5;
unsigned debug_abstract_start;
static const unsigned hartsellen = 10;