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author | Thanos Makatos <thanos.makatos@nutanix.com> | 2021-06-18 12:01:07 +0100 |
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committer | GitHub <noreply@github.com> | 2021-06-18 12:01:07 +0100 |
commit | 3dea51565391dc81ae834b3ecc4f8521c3f03786 (patch) | |
tree | c8d6f2ef8981d4358fe777520fb74ec2e566dd13 /test/py | |
parent | 6b8d93075499f0db5d0bfb9386e9024a0bdf68cf (diff) | |
download | libvfio-user-3dea51565391dc81ae834b3ecc4f8521c3f03786.zip libvfio-user-3dea51565391dc81ae834b3ecc4f8521c3f03786.tar.gz libvfio-user-3dea51565391dc81ae834b3ecc4f8521c3f03786.tar.bz2 |
superficially handle Device Control 2 and Link Control 2 (#568)
* superficially handle Device Control 2 and Link Control 2
Signed-off-by: Thanos Makatos <thanos.makatos@nutanix.com>
Reviewed-by: John Levon <john.levon@nutanix.com>
Diffstat (limited to 'test/py')
-rw-r--r-- | test/py/libvfio_user.py | 3 | ||||
-rw-r--r-- | test/py/test_pci_caps.py | 27 |
2 files changed, 30 insertions, 0 deletions
diff --git a/test/py/libvfio_user.py b/test/py/libvfio_user.py index f0fc568..70986fa 100644 --- a/test/py/libvfio_user.py +++ b/test/py/libvfio_user.py @@ -61,6 +61,9 @@ PCI_CAP_ID_PM = 0x1 PCI_CAP_ID_VNDR = 0x9 PCI_CAP_ID_EXP = 0x10 +PCI_EXP_DEVCTL2 = 40 +PCI_EXP_LNKCTL2 = 48 + PCI_EXT_CAP_ID_DSN = 0x03 PCI_EXT_CAP_ID_VNDR = 0x0b diff --git a/test/py/test_pci_caps.py b/test/py/test_pci_caps.py index be1914d..5af54e3 100644 --- a/test/py/test_pci_caps.py +++ b/test/py/test_pci_caps.py @@ -326,5 +326,32 @@ def test_pci_cap_write_msix(): # FIXME pass + +def test_pci_cap_write_pxdc2(): + sock = connect_client(ctx) + offset = vfu_pci_find_capability(ctx, False, PCI_CAP_ID_EXP) + PCI_EXP_DEVCTL2 + data = b'\xde\xad' + write_region(ctx, sock, VFU_PCI_DEV_CFG_REGION_IDX, offset=offset, + count=len(data), data=data) + payload = read_region(ctx, sock, VFU_PCI_DEV_CFG_REGION_IDX, offset=offset, + count=len(data)) + assert payload == data + disconnect_client(ctx, sock) + + +def test_pci_cap_write_pxlc2(): + sock = connect_client(ctx) + offset = vfu_pci_find_capability(ctx, False, PCI_CAP_ID_EXP) + PCI_EXP_LNKCTL2 + data = b'\xbe\xef' + write_region(ctx, sock, VFU_PCI_DEV_CFG_REGION_IDX, offset=offset, + count=len(data), data=data) + payload = read_region(ctx, sock, VFU_PCI_DEV_CFG_REGION_IDX, offset=offset, + count=len(data)) + assert payload == data + disconnect_client(ctx, sock) + + def test_pci_cap_cleanup(): vfu_destroy_ctx(ctx) + +# ex: set tabstop=4 shiftwidth=4 softtabstop=4 expandtab: # |