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| author | Changpeng Liu <changpeng.liu@intel.com> | 2020-06-02 16:17:30 +0800 |
|---|---|---|
| committer | Thanos Makatos <thanos.makatos@nutanix.com> | 2020-07-22 05:02:39 -0400 |
| commit | 23524e7cddcefd7592c9588c9dcbe98f5c762aa6 (patch) | |
| tree | 88ba0b89db002940180f9bf95e1cd20da564d8bf /README.md | |
| parent | 5cdbe0fcfdd8e83c07ca0f0975916db65837ad7d (diff) | |
| download | libvfio-user-23524e7cddcefd7592c9588c9dcbe98f5c762aa6.zip libvfio-user-23524e7cddcefd7592c9588c9dcbe98f5c762aa6.tar.gz libvfio-user-23524e7cddcefd7592c9588c9dcbe98f5c762aa6.tar.bz2 | |
muser: use the correct PCI_COMMAND interrupt disable(ID) bit
When PCI_COMMAND interrupt disable bit set to 1, it means
disable the pin-based INTx interrupt.
For NVMe controller, it will use INTx first, and then switch
to MSIX, the interrupt vector 0 is both valid for INTx and
MSIX, so here we remove the check when posting an interrupt,
just check the interrupt fd is valid or not.
Signed-off-by: Changpeng Liu <changpeng.liu@intel.com>
Diffstat (limited to 'README.md')
0 files changed, 0 insertions, 0 deletions