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author | Havard Skinnemoen <hskinnemoen@google.com> | 2022-03-31 11:32:37 -0700 |
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committer | GitHub <noreply@github.com> | 2022-03-31 11:32:37 -0700 |
commit | 1287b6e42e839ba2ab0f06268c5b53ae60df3537 (patch) | |
tree | 524eb07d03ed40f0cf3a3d5737048e75e5088826 /README.md | |
parent | 0c37a43527f0ee2b9584e7fb2fdc805e902635ac (diff) | |
parent | 1e1e1186b8a5c69527e65c1555f70943f9e4942b (diff) | |
download | vbootrom-master.zip vbootrom-master.tar.gz vbootrom-master.tar.bz2 |
Add basic NPCM8XX support
Diffstat (limited to 'README.md')
-rw-r--r-- | README.md | 48 |
1 files changed, 7 insertions, 41 deletions
@@ -1,44 +1,10 @@ -# Virtual Boot ROM for NPCM7xx SoCs +# Virtual Boot ROM for NPCM SoCs -This is not an officially supported Google product. +This repository contains simple Boot ROMs for Nuvoton based +BMC images that are intended to be used by [QEMU](http://www.qemu.org) +when emulating NPCM based machines. -This is a super simple Boot ROM that is intended to be used as a `-bios` image -for [QEMU](http://www.qemu.org/) when emulating an NPCM7xx-based machine. +## Subdirectories -## Building - -If you have a 32-bit ARM compiler installed as `arm-none-eabi-gcc`, simply run -`make`. - -If your ARM compiler has a different name, you'll need to override the -`CROSS_COMPILE` prefix, e.g. like this: - -``` -make CROSS_COMPILE=arm-linux-gnueabi- -``` - -If either case is successful, a `npcm7xx_bootrom.bin` file will be produced. - -## Using - -The Boot ROM image may be passed to a QEMU system emulator using the `-bios` option. For example like this: - -``` -qemu-system-arm -machine quanta-gsj -nographic \ - -bios "${IMAGES}/npcm7xx_bootrom.bin" - -drive file="${IMAGES}/image-bmc,if=mtd,bus=0,unit=0,format=raw,snapshot=on" -``` - -## Limitations - -* Secure boot is not supported. -* Only booting from offset 0 of the flash at SPI0 CS0 is implemented. -* Fallback images (if the first image doesn't boot) are not implemented. -* Exception vectors are copied to SRAM, but not remapped. -* Most OTP bits and straps are not honored. -* The reset type bits are not updated. -* OTP protection is not implemented. -* No clock initialization is performed. -* UART programming protocol is not implemented. -* Host notification through the PCI mailbox is not implemented. -* Most fields in the ROM status structure are not set. +npcm7xx: This subdir contains Boot ROM for NPCM7XX, a 32-bit ARM image. +npcm8xx: This subdir contains Boot ROM for NPCM8XX, a 64-bit ARM image. |