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2024-10-10sunxi: H616: switch to OF_UPSTREAMAndre Przywara1-70/+0
With the recent "old-style sunxi" sync and the penultimate OF_UPSTREAM DT update, both directories were based on the same v6.10 kernel tree. And while there is one subtle difference in many Allwinner SoC's DT files, the H616 ones turn out to be identical. Remove the old copies of the H616 related .dts and .dtsi files, and switch the whole H616 SoC over to use OF_UPSTREAM. This immediately benefits from the recent upstream DT update, to kernel v6.11. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-07-18ARM: dts: remove leftover Amlogic GX/G12 bindings headersNeil Armstrong3-104/+0
Remove the leftover Amlogic GX/G12 bindings headers that maked the v6.10 upstream DT fail to build. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-06-24dt-bindings: imx: Drop redundant imports with dts/upstreamSumit Garg4-228/+0
Drop redundant header imports with dts/upstream already providing updated headers which have been checked to be backwards compatibility. The imx headers which aren't present in dts/upstream are as follows: - include/dt-bindings/clock/imxrt1020-clock.h - include/dt-bindings/clock/imx8qm-clock.h - include/dt-bindings/clock/imxrt1170-clock.h - include/dt-bindings/clock/imx8qxp-clock.h - include/dt-bindings/memory/imxrt-sdram.h - include/dt-bindings/pinctrl/pads-imx8qxp.h - include/dt-bindings/pinctrl/pads-imx8qm.h - include/dt-bindings/soc/imx8_pd.h - include/dt-bindings/soc/imx_rsrc.h hence these aren't dropped yet but there was an unused header: - include/dt-bindings/pinctrl/pins-imx8mq.h which has been dropped as well. There shouldn't be any funtional impact with this change but it rather allows iMX platforms to use upstream dt-bindings headers in a backwards compatible manner. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2024-05-07rockchip: rk3588: Remove redundant device tree filesJonas Karlman1-754/+0
Remove redundant device tree files now that RK3588 boards have been migrated to use OF_UPSTREAM. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-04-04dts: meson: Drop redundant G12A, G12B & SM1 devicetree filesNeil Armstrong3-209/+0
Since meson G12A, G12B & SM1 based boards switched to using upstream DT, so drop redundant files from arch/arm/dts directory. Only *-u-boot.dtsi files kept in arch/arm/dts directory for these boards. Cc: Sumit Garg <sumit.garg@linaro.org> Acked-by: Viacheslav Bocharov <adeep@lexina.in> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # khadas-vim3_android Link: https://lore.kernel.org/r/20240329-u-boot-of-upstream-v2-5-2512ad3eb63d@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-04-04dts: meson: Drop redundant GXL, GXM & AXG devicetree filesNeil Armstrong2-284/+0
Since meson GXL, GXM & AXG based boards switched to using upstream DT, so drop redundant files from arch/arm/dts directory. Only *-u-boot.dtsi files kept in arch/arm/dts directory for these boards. Cc: Sumit Garg <sumit.garg@linaro.org> Acked-by: Viacheslav Bocharov <adeep@lexina.in> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # khadas-vim3_android Link: https://lore.kernel.org/r/20240329-u-boot-of-upstream-v2-3-2512ad3eb63d@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-03-19Merge tag 'u-boot-socfpga-next-20240319' of ↵WIP/19Mar2024-nextTom Rini1-0/+80
https://source.denx.de/u-boot/custodians/u-boot-socfpga into next - A new driver in the misc to register setting from device tree. This also provides user a clean interface and all register settings are centralized in one place, device tree. - Enable Agilex5 platform for Intel product. Changes, modification and new files are created for board, dts, configs and makefile to create the base for Agilex5. Build-tested on SoC64 boards, boot tested on some of them.
2024-03-18arch: arm: Agilex5 enablementJit Loon Lim1-0/+80
This patch is to enable Agilex5 platform for Intel product. Changes, modification and new files are created for board, dts, configs and makefile to create the base for Agilex5. Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2024-03-01dt-bindings: import headers for MSM8916Caleb Connolly1-0/+100
Import the dt-bindings headers in preparation for switching to upstream DTS for MSM8916. Taken from kernel tag v6.7 Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-03-01dt-bindings: import headers for SDM845Caleb Connolly2-0/+39
Import the DT bindings headers that are used by SDM845 from Linux. Taken from kernel tag v6.7 Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-01-16clk/qcom: handle resets and clocks in one deviceKonrad Dybcio1-92/+0
Qualcomm's clock controller blocks actually do much more than it says on the tin.. They provide clocks, resets and power domains. Currently, U-Boot requires one to spawn 2 separate devices for controlling clocks and resets, both spanning the same register space. Refactor the code to make it work with just a single DT node, making it compatible with upstream Linux bindings and dropping the dedicated reset driver in favour of including it in the clock driver. Heavily inspired by Renesas code for a similar hw block. [caleb: moved drivers to clk/qcom, added reset driver and adjusted bind logic. Imported qcom,gcc-ipq4019.h from Linux] Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2023-11-10tree-wide: Replace http:// link with https:// link for ti.comNishanth Menon1-1/+1
Replace instances of http://www.ti.com with https://www.ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-10-22sunxi: dts: arm: add T113s/D1 DT files from Linux-v6.6-rc6Andre Przywara2-0/+95
This copies in some devicetree files from the official Linux kernel tree, v6.6-rc6. It covers a board with the Allwinner T113s SoC, which shares many devices with its RISC-V sibling, the Allwinner D1(s). This is the reason for the core .dtsi files landing in the arch/riscv directory. We are only adjusting the include path to accommodate for the differences in the U-Boot build system. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-10-22sunxi: dts: arm64: update devicetree files from Linux-v6.6-rc6Andre Przywara3-3/+3
Sync the devicetree files from the official Linux kernel tree, v6.6-rc6. This is covering Allwinner SoCs with 64-bit ARM cores. Only small cosmetic changes (clock name fixed), but we add the DT for the new OrangePi Zero 3 board, for which U-Boot enablement patches are pending. As before, this omits the non-backwards compatible changes to the R_INTC controller, to remain compatible with older kernels. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-10-12dt-bindings: reset: add Meson A1 reset bindingsAlexey Romanov1-0/+76
Get this from Linux 6.6-rc3. Signed-off-by: Alexey Romanov <avromanov@salutedevices.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231005085434.74755-2-avromanov@salutedevices.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-04ARM: dts: stm32mp: alignment with v6.6-rc1Patrice Chotard2-2/+2
Device tree alignment with Linux kernel v6.6.rc1. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-08-03reset: mediatek: add reset definition for MediaTek MT7988 SoCWeijie Gao1-0/+31
This patch adds reset bits for MediaTek MT7988 Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2023-06-16ARM: dts: stm32mp: alignment with v6.3Patrick Delaunay1-1/+1
Device tree alignment with Linux kernel v6.3: - f5a058023239 - ARM: dts: stm32: add i2c nodes into stm32mp131.dtsi - 8539ebb435a5 - ARM: dts: stm32: enable i2c1 and i2c5 on stm32mp135f-dk.dts - 8539ebb435a5 - ARM: dts: stm32: add spi nodes into stm32mp131.dtsi - 15f72e0da4da - ARM: dts: stm32: add pinctrl and disabled spi5 node in stm32mp135f-dk - ea99a5a02ebc - ARM: dts: stm32: Create separate pinmux for qspi cs pin in stm32mp15-pinctrl.dtsi - a306d8962a24 - ARM: dts: stm32: Rename mdio0 to mdio - 0a5ebb1f3367 - ARM: dts: stm32: Replace SAI format with dai-format DT property - ccdab19738a6 - ARM: dts: stm32: add adc support to stm32mp13 - 022932ab55fd - ARM: dts: stm32: add adc pins muxing on stm32mp135f-dk - ab2806ddad9d - ARM: dts: stm32: add dummy vdd_adc regulator on stm32mp135f-dk - e46a180c060f - ARM: dts: stm32: add adc support on stm32mp135f-dk - 9ebf215fbae1 - ARM: dts: stm32: add PWR fixed regulators on stm32mp131 - 16f4ff60519a - ARM: dts: stm32: add USBPHYC and dual USB HS PHY support on stm32mp131 - 4a47f0f3e936 - ARM: dts: stm32: add UBSH EHCI and OHCI support on stm32mp131 - 2a46bb66c47f - ARM: dts: stm32: add USB OTG HS support on stm32mp131 - 9ebf215fbae1 - ARM: dts: stm32: add fixed regulators to support usb on stm32mp135f-dk - 16f4ff60519a - ARM: dts: stm32: enable USB HS phys on stm32mp135f-dk - c4e7254cf6dc - ARM: dts: stm32: enable USB Host EHCI on stm32mp135f-dk - 44978e135916 - ARM: dts: stm32: add pins for stm32g0 typec controller on stm32mp13 - 4f532403b1e5 - ARM: dts: stm32: enable USB OTG in dual role mode on stm32mp135f-dk - e1f15571c96c - ARM: dts: stm32: add mcp23017 pinctrl entry for stm32mp13 - 6cc71374002e - ARM: dts: stm32: add mcp23017 IO expander on I2C1 on stm32mp135f-dk - 7ffd2266bd32 - ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcor-som - 21d83512bf2b - ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcom-som - 732dbcf52f74 - ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp151a-prtt1l - 003b7c6b24f4 - ARM: dts: stm32: remove sai kernel clock on stm32mp15xx-dkx - f2b17b39bfff - ARM: dts: stm32: rename sound card on stm32mp15xx-dkx - dee3cb759d3d - ARM: dts: stm32: Remove the pins-are-numbered property - ae8cf3b48727 - ARM: dts: stm32: add i2s nodes on stm32mp131 - 619746a27bd0 - ARM: dts: stm32: add sai nodes on stm32mp131 - c5e05d08ef90 - ARM: dts: stm32: add spdifrx node on stm32mp131 - 0a5afd3ee0d0 - ARM: dts: stm32: add dfsdm node on stm32mp131 - bf9d876bea2e - ARM: dts: stm32: add timers support on stm32mp131 - a3183748371d - ARM: dts: stm32: add timer pins muxing for stm32mp135f-dk - a9060c1326bc - ARM: dts: stm32: add timers support on stm32mp135f-dk - a12154058f75 - ARM: dts: stm32: Fix User button on stm32mp135f-dk - 2f33df889e99 - ARM: dts: stm32: Use new media bus type macros - 366384e49551 - ARM: dts: stm32: Update part number NVMEM description on stm32mp131 Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-04-20dt-bindings: reset: Add StarFive JH7110 reset definitionsYanhong Wang1-0/+183
Add resets for the StarFive JH7110 system(SYS),system-top-group(STG) and always-on(AON) reset controller. Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com> Tested-by: Conor Dooley <conor.dooley@microchip.com>
2023-02-28dt-bindings: reset: add rk3588 reset definitionsJagan Teki1-0/+754
Add reset ID defines for rk3588. commit <0a8eb7dae617> ("dt-bindings: reset: add rk3588 reset definitions") Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-06Merge tag 'u-boot-at91-2023.04-a' of ↵Tom Rini1-0/+10
https://source.denx.de/u-boot/custodians/u-boot-at91 into next First set of u-boot-at91 features for the 2023.04 cycle: This feature set includes the new DM-based NAND flash driver (old non-DM driver is still kept for backwards compatibility), and the move to DM NAND flash driver for sam9x60ek board. Feature set also includes devicetree alignment for sama7g5 with Linux, devicetree alignment on USB with Linux for all boards (sama5, sam9x60), chip id for sama7g5, minor configs and tweaks.
2023-01-05dt-bindings: reset: add sama7g5 definitionsSergiu Moga1-0/+10
Upstream linux commit 5994f58977e0. Add reset bindings for SAMA7G5. At the moment only USB PHYs are included. The three reset USB phy's have their ID's mapped from 4 to 6. There are no USB phy's with ID's numbered from 0 to 3. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2022-12-07dt-bindings: stm32mp13: add clock & reset support for STM32MP13Gabriel Fernandez1-0/+100
Add support of stm32mp13 DT bindings of clock and reset. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-11-08imx8mp: synchronise device tree with linuxMarcel Ziswiler1-0/+50
Synchronise device tree with linux v6.1-rc3. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8m{m,n,p}-venice-*
2022-11-08imx8mq: synchronise device tree with linuxMarcel Ziswiler1-29/+32
Synchronise device tree with linux v6.1-rc3. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-11-08imx8ulp: synchronise device tree with linuxMarcel Ziswiler1-0/+59
Synchronise device tree with linux v6.1-rc3. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-10-06arm: nuvoton: Add support for Nuvoton NPCM845 BMCJim Liu1-0/+124
Add basic support for the Nuvoton NPCM845 EVB (Arbel). Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-07-26dt-bindings: versal: Add versal reset IDsMichal Simek1-0/+105
The same file is already the part of Linux kernel that's why add it also to u-boot to be able to use it in source code and DT files. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1c3bc464536a9bf64a2e8bfe18a938c9cb490620.1657192249.git.michal.simek@amd.com
2022-07-13reset: mtmips: add reset controller support for MediaTek MT7621 SoCWeijie Gao1-0/+38
This patch adds reset controller bits definition header file for MediaTek MT7621 SoC Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-12ARM: dts: stm32mp15: alignment with v5.19Patrick Delaunay1-0/+14
Device tree alignment with Linux kernel v5.19-rc1 - ARM: dts: stm32: Add alternate pinmux for ethernet0 pins - ARM: dts: stm32: Add alternate pinmux for mco2 pins - ARM: dts: stm32: fix pinctrl node name warnings (MPU soc) - ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group - dt-bindings: clock: add IDs for SCMI clocks on stm32mp15 - dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15 - dt-bindings: clock: stm32mp15: rename CK_SCMI define - dt-bindings: reset: stm32mp15: rename RST_SCMI define - dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15 - dt-bindings: clk: cleanup comments - ARM: dts: align SPI NOR node name with dtschema - ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15 - ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) - ARM: dts: stm32: move SCMI related nodes in a dedicated file for stm32mp15 + patch from stm32-dt-for-v5.19-fixes-2 - ARM: dts: stm32: move SCMI related nodes in a dedicated file for stm32mp15 - ARM: dts: stm32: fix pwr regulators references to use scmi - ARM: dts: stm32: use the correct clock source for CEC on stm32mp151 - ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board - ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI - ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15 Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-23dt-bindings: sunxi: Update clock/reset binding headersSamuel Holland2-10/+4
Some devicetree updates make use of newly-exposed clocks and resets. To support that, copy the binding headers from the Linux v5.18-rc1 tag. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-05arm: nuvoton: Add support for Nuvoton NPCM750 BMCJim Liu1-0/+91
Add basic support for the Nuvoton NPCM750 EVB (Poleg). Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-02-04ARM: dts: suniv: Add device tree files and bindings for F1C100sIcenowy Zheng1-0/+38
Add device tree files for suniv and Lichee Pi Nano it is a board based on F1C100s. dt-bindings/dts are synced with 5.16.0 Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-05-31riscv: dts: add fu740 supportGreen Wan1-0/+19
Add dts support for fu740. The HiFive Unmatched support is based on fu740 cpu and drivers in following patch set. Signed-off-by: Green Wan <green.wan@sifive.com> [greentime.hu: set fu740 speed to 1.2GHz] Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-01-25Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiWIP/25Jan2021Tom Rini2-0/+71
- New Allwinner H616 SoC support (sans Ethernet & USB) - H6 DT update - Tanix TX6 TV box support - OrangePi 3 support - OrangePi Zero2 (H616) support
2021-01-25arm: sunxi: add initial H616 DTSI and headersJernej Skrabec2-0/+71
This commit introduces H616 DTSI file and dt-bindings headers needed for device tree files. Files are taken from v3 Linux H616 support submission[1], as the H616 .dtsi file is not merged upstream yet. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2021-January/632082.html Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-24reset: mtmips: add reset controller support for MediaTek MT7620 SoCWeijie Gao1-0/+35
This patch adds reset controller bits definition header file for MediaTek MT7620 SoC Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-18reset: aspeed: Add AST2600 reset supportChia-Wei, Wang1-0/+70
Add controller reset support through the System Control Unit (SCU) of AST2600 SoC. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-11-25reset: stm32: Add support of MCU HOLD BOOTPatrick Delaunay1-0/+1
Handle the register RCC_MP_GCR without SET/CLR registers but with a direct access to bit BOOT_MCU: - deassert => set the bit: The MCU will not be in HOLD_BOOT - assert => clear the bit: The MCU will be set in HOLD_BOOT With this patch the RCC driver handles the MCU_HOLD_BOOT_R value added in binding stm32mp1-resets.h Cc: Fabien DESSENNE <fabien.dessenne@st.com> Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-17sunxi: DT: A64: update device tree filesSamuel Holland1-0/+1
Import updated device trees from Linux tag v5.9. This picks up new hardware (PinePhone, PineTab); and it drops the U-Boot specific DTSI files for the Pinebook and the Teres-I, since the ANX6345 bridge is now supported upstream. A couple of headers needed updates for recently-added hardware support. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-10-22reset: ast2500: Use SCU for reset controlChia-Wei, Wang1-34/+39
The System Control Unit (SCU) controller of Aspeed SoCs provides the reset control for each peripheral. This patch refactors the reset method to leverage the SCU reset control. Thus the driver dependency on watchdog including dedicated WDT API and reset flag encoding can be eliminated. The Kconfig description is also updated accordingly. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-10-06Merge tag 'u-boot-amlogic-20201005' of ↵Tom Rini1-1/+1
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - generate unique mac address from SoC serial on S400 board - Add USB support for GXL and AXG SoCs - Update Gadget code to use the new GXL and AXG USB glue driver - Add a VIM3 board support to add dynamic PCIe enable in OS DT - Fix AXG pinmux with requesting GPIOs - Add missing GPIOA_18 for AXG pinctrl - Add Amlogic PWM driver
2020-10-05ARM: dts: sync amlogic AXG/GXL/GXM DT from Linux 5.8-rc1Neil Armstrong1-1/+1
This imports the AXG, GXL & GXM SoC and boards DT changes from the Linux commit b3a9e3b9622a ("Linux 5.8-rc1"). This change also removes GXL & GXM u-boot.dtsi hacks for USB gadget. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-09-18reset: Add IPQ40xx reset controller driverRobert Marko1-0/+92
On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets. So since this will be needed by further drivers, lets add a driver for the reset controller. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-08-19arm: dts: mt7622: add SATA reset constantsFrank Wunderlich1-1/+4
add reset constants used for SATA to header file Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-04dt-bindings: prci: add indexes for reset signals available in prciSagar Shrikant Kadam1-0/+19
Add bit indexes for reset signals within the PRCI module on FU540-C000 SoC. The DDR and ethernet sub-system's have reset signals indicated by these reset indexes. Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-10reset: Add Raspberry Pi 4 firmware reset controllerNicolas Saenz Julienne1-0/+13
Raspberry Pi 4's co-processor controls some of the board's HW initialization process, but it's up to Linux to trigger it when relevant. Introduce a reset controller capable of interfacing with RPi4's co-processor that models these firmware initialization routines as reset lines. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-01riscv: Add device tree for K210 and Sipeed Maix BitMSean Anderson1-0/+38
Where possible, I have tried to find compatible drivers based on the layout of registers. However, many devices remain untested. All untested devices have been left disabled, but some tentative properties (such as compatible strings, and clocks, interrupts, and resets properties) have been added. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-04-24arm: actions: add S700 SoC device treeAmit Singh Tomar1-0/+34
This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d") and required binding for S700 SoC that is a 64-bit Quad-core ARM Cortex-A53 cores. It also provisions dts file to be built based on selected platform(CONFIG_MACH_S900/S700). Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24arm: dts: sync dts for Action Semi S900Amit Singh Tomar1-0/+65
Synchronize device tree bindings with v5.5-rc6 tag with commit id "b3a987b0264d". Also, it removes older clock binding defined for S900 along with undocumented compatible string "actions,s900-serial" from serial driver and adapts clock driver to cater to new bindings. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
generated by cgit v1.1 at 2024-11-16 12:34:22 +0000