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2021-08-31nxp: Migrate a number of DDR related symbols to KconfigTom Rini1-0/+21
- Guard most of the options in drivers/ddr/fsl/Kconfig with SYS_FSL_DDR || SYS_FSL_MMDC. - Migrate FSL_DMA, DDR_ECC, DDR_ECC_CMD, and ECC_INIT_VIA_DDRCONTROLLER to Kconfig. - Clean up the logic for including the DDR_ECC_CMD code. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31nxp: Migrate CONFIG_DDR_CLK_FREQ to KconfigTom Rini1-0/+26
As this symbol can either be a fixed value or the function get_board_ddr_clk, migration is tricky. Introduce a choice of DYNAMIC or STATIC_DDR_CLK_FREQ. If DYNAMIC, we continue to use the board defined get_board_ddr_clk function. If STATIC, set CONFIG_DDR_CLK_FREQ to that value and now include/clock_legacy.h contains the function prototype or defines get_board_ddr_clk() to that static value. Update callers to test for DYNAMIC or STATIC. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31ddr: Migrate DDR_SPD to KconfigTom Rini2-0/+10
Move the symbol that controls building some JEDEC SPD support functions to Kconfig. This is required on the TI keystone 2 platforms and very frequently (but not always) used on large number of Freescale/NXP platforms, so use imply there. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31mvebe: Migrate CONFIG_DDR_LOG_LEVEL to KconfigTom Rini1-4/+0
Move this specific option to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZETom Rini1-2/+2
We have a number of CONFIG symbols to express the fixed size of system memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire size rather than MiB. Cc: Marek Behún <marek.behun@nic.cz> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Marek Behún <marek.behun@nic.cz>
2021-08-30global: Remove unused or unnecessary CONFIG symbols related to DDRTom Rini1-3/+1
These symbols are now either unused or were only used within the config file to determine other logic, which could be done in a way that doesn't further pollute the CONFIG namespace. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30spi: altera_spi: Do not abuse CONFIG namespaceTom Rini1-4/+2
The value CONFIG_ALTERA_SPI_IDLE_VAL is never re-defined by a board. Rename this to ALTERA_SPI_IDLE_VAL. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-08-30video: Remove ati_radeon_fbTom Rini4-1255/+0
This driver is currently unused. Remove. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-08-30global: Remove dead code that starts with CONFIG_[0-9A]Tom Rini2-78/+3
This removes a number of spots of dead code based on symbols that start with CONFIG_[0-9] or CONFIG_A. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30i8042: Do not abuse CONFIG namespaceTom Rini1-2/+2
This driver uses the CONFIG namespace to set the chips internal CONFIG namespace related bits. However, CONFIG is reserved for the top-level Kconfig based configuration system. Use CFG as the namespace here instead to avoid pollution. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-08-30nand: vf610_nfc: Do not abuse CONFIG namespaceTom Rini1-27/+27
This driver uses the CONFIG namespace to set the chips internal CONFIG namespace related bits. However, CONFIG is reserved for the top-level Kconfig based configuration system. Use CFG as the namespace here instead to avoid pollution. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-08-30i2c: fsl_i2c: Migrate to KconfigTom Rini2-5/+30
- As there are no boards that use different values for speed / slave on different buses, use a single option. - Switch to using the common SYS_I2C_SPEED / SYS_I2C_SLAVE options. - Introduce _HAS_ options for additional buses as only the first one is common to all users. - Convert all remaining symbols to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30rcar: i2c: Migrate SYS_I2C_SH to KconfigTom Rini2-5/+53
- Migrate SYS_I2C_SH and related defines to Kconfig - Remove currently unused SYS_I2C_SH related defines - Cleanup related README section. Cc: Marek Vasut <marek.vasut+renesas@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30Convert CONFIG_SYS_I2C_MXC et al to KconfigTom Rini2-38/+9
This converts the following to Kconfig: CONFIG_SYS_I2C_MXC CONFIG_SYS_I2C_MXC_I2C1 CONFIG_SYS_I2C_MXC_I2C2 CONFIG_SYS_I2C_MXC_I2C3 CONFIG_SYS_I2C_MXC_I2C4 Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30Convert CONFIG_SYS_I2C_SPEED et al to KconfigTom Rini2-15/+20
This converts the following to Kconfig: CONFIG_SYS_I2C_SPEED CONFIG_SYS_I2C_SLAVE Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30i2c: Remove non-DM code from ihs_i2c.cTom Rini1-228/+0
This driver and it's only user are converted to DM_I2C, remove legacy code. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30ti: i2c: Convert CONFIG_SYS_OMAP24_I2C to CONFIG_SYS_I2C namespaceTom Rini2-40/+12
The omap24xx I2C driver uses its own CONFIG namespace for common I2C variables. Rather than convert more of them to Kconfig, rename these to the common I2C ones and remove the entirely unused functionality. As part of this, we make the am335x_shc platforms consistent with their intended speed values. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30i2c: designware: Remove unused non-DM functionalityTom Rini1-18/+0
There are no users of more than 1 i2c bus in the non-DM case currently. Remove the additional defines for this. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30Convert CONFIG_SYS_I2C_EARLY_INIT to KconfigTom Rini2-5/+7
Convert SYS_I2C_EARLY_INIT to Kconfig, and make it depend on SPL_SYS_I2C_LEGACY. Remove the weak implementation as it's either something that needs to exist for real, or shouldn't be called. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30Convert CONFIG_SYS_I2C_LEGACY to Kconfig and add CONFIG_[ST]PL_SYS_I2C_LEGACYTom Rini2-1/+23
First, we convert CONFIG_SYS_I2C_LEGACY to Kconfig. Next, as you cannot have SYS_I2C_LEGACY and DM_I2C at the same time, introduce CONFIG_SPL_SYS_I2C_LEGACY so that we can enable the legacy option only in SPL. Finally, for some PowerPC cases we also need CONFIG_TPL_SYS_I2C_LEGACY support. Convert all of the existing users to one or more symbols. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30i2c: Remove unused additional legacy soft i2c bus supportTom Rini1-77/+0
Currently the legacy software i2c support is only used for a single bus. Remove all of the extra and unused support. Also update the README to not reference that, and finish removing some already badly auto-edited related text. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30Convert CONFIG_SYS_I2C_MVTWSI to KconfigTom Rini1-1/+0
This converts the following to Kconfig: CONFIG_SYS_I2C_MVTWSI Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30Convert CONFIG_SYS_I2C_SOFT et al to KconfigTom Rini1-0/+19
This converts the following to Kconfig: CONFIG_SYS_I2C_SOFT CONFIG_SYS_I2C_SOFT_SPEED CONFIG_SYS_I2C_SOFT_SLAVE Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30Convert CONFIG_SYS_I2C_EEPROM_ADDR et al to KconfigTom Rini1-26/+2
- Rename usages of CONFIG_SYS_DEF_EEPROM_ADDR to CONFIG_SYS_I2C_EEPROM_ADDR based on current usage. - Convert CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SYS_I2C_EEPROM_BUS, CONFIG_CONFIG_SYS_EEPROM_SIZE CONFIG_SYS_EEPROM_PAGE_WRITE_BITS and CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS to Kconfig. We move these symbols around a bit and add appropriate dependencies to them. In some cases, we now add a correct default value as well. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30i2c: S3C24X0: Finish Kconfig migrationTom Rini2-7/+3
Finish moving this driver to Kconfig. - Update the dependency logic for Exynos5 too - Remove the unused CONFIG_SYS_I2C_S3C24X0_SPEED variable - Drop CONFIG_SYS_I2C_S3C24X0_SLAVE as it's always set to 0. - Move the internal SYS_I2C_S3C24X0_SLAVE define closer to the only user. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-08-30usb: dwc2: Rename CONFIG_DWC2 namespace to DWC2Tom Rini2-47/+47
There are a number of DWC2 configuration options that are set in dwc2.h and referenced in dwc2.c only. Move these out of the CONFIG_DWC2 namespace and in to the DWC2 namespace. Note that hikey was defining an option that was already always enabled, so we can remove that hunk. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-27Merge tag 'xilinx-for-v2021.10-rc3' of ↵WIP/27Aug2021Tom Rini14-42/+662
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.10-rc3 xilinx: - Disable CONFIG_ARCH_FIXUP_FDT_MEMORY - Print information about cpu via soc drivers and enable DISPLAY_CPUINFO - Wire infrastructure for DTB_RESELECT and MULTI_DTB_FIT zynq: - Wire single QSPI - Use power-source instead of io-standard properties - Enable nor on zc770-xm012 zynqmp: - Change handling around multi_boot() - Setup offset for u-boot.itb in spi - Generate run time dfu_alt_info for capsule update - Use explicit values for enums (zynqmp_firmware.h) - Enable RTC/SHA1/BUTTON/BUTTON_GPIO command - Disable WDT driver by default - Bind usb/scsi via preboot because of EFI - DT updates/fixes - Add soc driver - Fix SPL SPI boot mode versal: - Add soc driver sdhci: - Update tap delay programming for zynq_sdhci driver cmd: - Fix RTC uclass handling in date command - Update pwm help message - Update reset help message watchdog: - Fix wwdt compilation rtc: - Deal with seq alias in rtc uclass - Add zynqmp RTC driver fdt: - Add kernel-doc for fdt_fixup_memory_banks()
2021-08-26watchdog: versal: Include header file needed for dev_ functionsAshok Reddy Soma1-0/+1
dev_dbg, dev_err and dev_warn seems to be moved to different header file. Include dm/device_compat.h file to compile properly. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26soc: xilinx: versal: Add soc_xilinx_versal driverT Karthik Reddy3-0/+85
soc_xilinx_versal driver allows identification of family & revision of versal SoC. This driver is selected by CONFIG_SOC_XILINX_VERSAL. Probe this driver using platdata U_BOOT_DEVICE structure which is defined at mach-versal/cpu.c. Add this config to xilinx_versal_virt_defconfig & xilinx_versal_mini_ospi_defconfig file to select this driver. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26soc: xilinx: zynqmp: Add soc_xilinx_zynqmp driverT Karthik Reddy3-0/+87
soc_xilinx_zynqmp driver allows identification of family & revision of zynqmp SoC. This driver is selected by CONFIG_SOC_XILINX_ZYNQMP. Add this config to xilinx_zynqmp_virt_defconfig file. Probe this driver using platdata U_BOOT_DEVICE structure which is specified in mach-zynqmp/cpu.c. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26mmc: zynq_sdhci: Use set_control_reg from sdhci.cAshok Reddy Soma1-20/+1
Since set_control_reg is available in sdhci.c, use it and remove arasan_sdhci_set_control_reg(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26mmc: zynq_sdhci: Wait till sd card detect state is stableT Karthik Reddy1-0/+19
As per SD spec when SD host controller is reset, it takes 1000msec to detect the card state. In case, if we enable the sd bus voltage & card detect state is not stable, then host controller will disable the sd bus voltage. In case of warm/subsystem reboot, due to unstable card detect state host controller is disabling the sd bus voltage to sd card causing sd card timeout error. So we wait for a maximum of 1000msec to get the card detect state stable before we enable the sd bus voltage. This current fix is workaround for now, this needs to be analysed further. Zynqmp platform should behave the same as Versal, but we did not encounter this issue as of now. So we are fixing it for Versal only. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26mmc: zynq_sdhci: Move setting tapdelay code to driverAshok Reddy Soma1-1/+107
Move tapdelay function calls to zynq_sdhci.c and make them static inline. zynqmp_tap_delay.h has function prototypes for the functions defined in tap_delays.c, which will not be needed anymore. Remove tap_delays.c and zynqmp_tap_delay.h files. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-08-26mmc: zynq_sdhci: Add xilinx_pm_request() method to set tapdelaysAshok Reddy Soma1-14/+59
Currently xilinx sdhci driver is using zynqmp_mmio_write() to set tapdelay values and DLL resets. Continue to use this for SPL and mini U-Boot where U-Boot will be executed at EL3 level. Use firmware call xilinx_pm_request() using appropriate arguments to set input/output tapdelays and also for DLL resets in regular flow(EL2). Host driver should explicitly request DLL reset before ITAP (assert DLL) and after OTAP (release DLL) to avoid issues in some cases. Also handle error return where possible. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-08-25ddr: altera: Add SDRAM driver for Intel N5X deviceTien Fong Chee4-1/+2371
The DDR subsystem in Diamond Mesa is consisted of controller, PHY, memory reset manager and memory clock manager. Configuration settings of controller, PHY and memory reset manager is come from DDR handoff data in bitstream, which contain the register base addresses and user settings from tool. Configuration settings of memory clock manager is come from the HPS handoff data in bitstream, however the register base address is defined in device tree. The calibration is fully done in HPS, which requires IMEM and DMEM binaries loading to PHY SRAM for running this calibration, both IMEM and DMEM binaries are also part of bitstream, this bitstream would be loaded to OCRAM by SDM, and configured by DDR driver. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2021-08-25ddr: socfpga: Enable memory test on memory size less than 1GBTien Fong Chee1-3/+21
Minimum 1GB memory size is required in current memory test, so this patch improves the memory test for processing memory size less than 1GB, and the size in power of two. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2021-08-25drivers: clk: Add memory clock driver for Intel N5X deviceSiew Chin Lim3-0/+221
Add memory clock manager driver for N5X. Provides memory clock initialization and enable functions. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-08-25drivers: clk: Add clock driver for Intel N5X deviceSiew Chin Lim3-1/+708
Add clock manager driver for N5X. Provides clock initialization and get_rate functions. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-08-23Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini4-12/+81
fsl-qoriq: Fixes related to env, spi, usb, crypto, configs, distro-boot for Layerscape Boards like lx2, sl28, ls2088ardb. powerpc: Fixes for t208xrdb revd board and cortina related configs update for T208xRDB, T4240RDB.
2021-08-23Merge tag 'for-v2021.10-rc3' of ↵Tom Rini8-0/+442
https://source.denx.de/u-boot/custodians/u-boot-i2c i2c changes for for-v2021.10-rc3 new driver: - Introduce mcp230xx support from Sebastian Reichel new feature: - i2c-gpio: add support for "sda-gpios" + "scl-gpios" i2c-gpio bindings. from Samuel Holland - bootcount: add a new driver with syscon as backend from Nandor Han
2021-08-22bootcount: add a new driver with syscon as backendNandor Han3-0/+172
The driver will use a syscon regmap as backend and supports both 16 and 32 size value. The value will be stored in the CPU's endianness. Signed-off-by: Nandor Han <nandor.han@vaisala.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-22i2c: i2c-gpio: Support the named GPIO bindingSamuel Holland1-0/+9
To avoid confusion about the order of the GPIOs, the i2c-gpio binding was updated to use a separate property for each GPIO instead of an array. However, the driver only supports the old binding. Add support for the new binding as well, so the driver continues to work as device trees are updated. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-08-22gpio: mcp230xx: Introduce new driverSebastian Reichel3-0/+246
Introduce driver for I2C based MCP230xx GPIO chips, which are quite common and already well supported by the Linux kernel. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-22i2c: add dm_i2c_reg_clrsetSebastian Reichel1-0/+15
Add function to apply a bitmask to an i2c register, so that specific bits can be cleared and/or set. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-21Fix flashing of eMMC user area with FastbootOleh Kravchenko1-7/+15
'gpt' and 'mmc0' fastboot partitions have been treated as the same device, but it is wrong. Fill disk_partition structure with eMMC user partition info to properly flash data. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Marek Vasut <marex@denx.de> Cc: Sean Anderson <sean.anderson@seco.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2021-08-21Fix flash and erase of eMMC Boot2 with FastbootOleh Kravchenko1-2/+2
The current U-Boot version has the next matches for boot partitions: > mmc0boot0 to EMMC_BOOT1 > mmc0boot1 to EMMC_BOOT1 (should be EMMC_BOOT2) This patch fixes a typo for the boot partition number. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2021-08-21clk: clk_versaclock: Add support for versaclock driverAdam Ford3-0/+1110
The driver is based on the Versaclock driver from the Linux code, but due differences in the clock API between them, some pieces had to be changed. This driver creates a mux, pfd, pll, and a series of fod ouputs. Rate Usecnt Name ------------------------------------------ 25000000 0 `-- x304-clock 25000000 0 `-- clock-controller@6a.mux 25000000 0 |-- clock-controller@6a.pfd 2800000000 0 | `-- clock-controller@6a.pll 33333333 0 | |-- clock-controller@6a.fod0 33333333 0 | | `-- clock-controller@6a.out1 33333333 0 | |-- clock-controller@6a.fod1 33333333 0 | | `-- clock-controller@6a.out2 50000000 0 | |-- clock-controller@6a.fod2 50000000 0 | | `-- clock-controller@6a.out3 125000000 0 | `-- clock-controller@6a.fod3 125000000 0 | `-- clock-controller@6a.out4 25000000 0 `-- clock-controller@6a.out0_sel_i2cb A translation function is added so the references to <&versaclock X> get routed to the corresponding clock-controller@6a.outX. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2021-08-18crypto/fsl: fix missed dma_addr_t -> caam_dma_addr_t conversionHoria Geantă1-1/+1
One of the "dma_addr_t" instances was left out when converting to "caam_dma_addr_t". Fixes: 2ff17d2f74c5 ("crypto: fsl: refactor for 32 bit version CAAM support on ARM64") Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18net: cortina: Add support for tfa boot in cortina firmwareKuldeep Singh1-10/+69
Add support for boards supporting TFA boot separately in cortina firmware. Please note, a weak function is defined to retrieve firmware address values as CONFIG_CORTINA_FW_ADDR is now defined in defconfig and can only have one possible value defined. This weak function will help in overwrting the values to get proper addresses as per boot source. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18configs: Migrate CORTINA_FW_ADDR and CORTINA_FW_LENGTH to KconfigKuldeep Singh1-0/+10
Use moveconfig.py script to convert below defines to Kconfig and move these entries to defconfigs. CONFIG_CORTINA_FW_ADDR CONFIG_CORTINA_FW_LENGTH Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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