aboutsummaryrefslogtreecommitdiff
path: root/drivers/reset
AgeCommit message (Expand)AuthorFilesLines
2022-07-26reset: zynqmp: Add reset driver support for versalT Karthik Reddy2-6/+10
2022-07-18reset: sunxi: Reuse the platform data from the clock driverSamuel Holland1-40/+3
2022-07-18reset: sunxi: Convert driver private data to platform dataSamuel Holland1-18/+18
2022-07-18reset: sunxi: Get the reset count from the CCU descriptorSamuel Holland1-4/+2
2022-07-06reset/aspeed: Implement status callbackJoel Stanley2-0/+36
2022-06-23reset: scmi: support SCMI multi-channelEtienne Carriere1-3/+22
2022-06-23firmware: scmi: prepare scmi uclass API to multi-channelEtienne Carriere1-2/+2
2022-05-05reset: Return 0 if ops unimplemented and remove empty functionsMarek Vasut25-302/+6
2022-03-02scmi: change parameter dev in devm_scmi_process_msgEtienne Carriere1-2/+2
2022-02-08reset: dra7: Add a reset driverKeerthy3-0/+104
2022-01-13treewide: invaild -> invalidSean Anderson1-1/+1
2021-11-23reset: scmi: define LOG_CATEGORYPatrick Delaunay1-0/+3
2021-10-11clk: sunxi: Move header out of arch directorySamuel Holland1-1/+1
2021-09-30WS cleanup: remove trailing white spaceWolfgang Denk1-5/+5
2021-09-30WS cleanup: remove trailing empty linesWolfgang Denk1-1/+0
2021-08-06reset: zynqmp: Add reset controller for ZynqMP SoCMichal Simek3-0/+110
2021-07-24reset: ast2600: Fix missing reference operatorChia-Wei Wang1-4/+4
2021-07-15reset: Avoid a warning in devm_reset_bulk_get_by_node()Simon Glass1-0/+2
2021-07-14reset: uniphier: Add PCIe reset entryKunihiko Hayashi1-0/+3
2021-07-06dm: define LOG_CATEGORY for all uclassPatrick Delaunay1-0/+2
2021-05-31board: sifive: add HiFive Unmatched board supportGreen Wan1-1/+1
2021-05-31drivers: clk: add fu740 supportGreen Wan1-1/+1
2021-05-28reset: stm32: Fix bank and offset computationPatrice Chotard1-4/+4
2021-04-27reset: fix reset_get_by_index_nodev index handlingNeil Armstrong1-1/+1
2021-04-08riscv: sifive: Rename fu540 board to unleashedBin Meng1-1/+1
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass1-0/+1
2021-01-24reset: reset-mtmips: add DM_FLAG_PRE_RELOC flagWeijie Gao1-0/+1
2021-01-18reset: aspeed: Add AST2600 reset supportChia-Wei, Wang3-0/+118
2021-01-13reset: stm32-reset: migrate trace to dev and log macroPatrick Delaunay1-4/+9
2021-01-05Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextWIP/05Jan2021-nextTom Rini6-6/+10
2021-01-05Merge tag 'v2021.01-rc5' into nextTom Rini2-2/+2
2021-01-05dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()Simon Glass1-1/+1
2021-01-05dm: core: Access device ofnode through functionsSimon Glass1-1/+1
2021-01-05dm: Use access methods for dev/uclass private dataSimon Glass4-4/+8
2020-12-13dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass1-2/+2
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass20-20/+20
2020-12-09treewide: Update email address Patrick Delaunay and Patrice ChotardPatrice Chotard2-2/+2
2020-11-25reset: stm32: Add support of MCU HOLD BOOTPatrick Delaunay1-4/+13
2020-10-22cosmetic: reset: ast2500: Rename driver and configsChia-Wei, Wang3-2/+2
2020-10-22reset: ast2500: Use SCU for reset controlChia-Wei, Wang2-51/+55
2020-10-06dm: add cells_count parameter in *_count_phandle_with_argsPatrick Delaunay1-1/+2
2020-09-30reset: add reset controller driver for SCMI agentsEtienne Carriere3-0/+90
2020-09-30test: reset: Add tests for the managed APIJean-Jacques Hiblot2-6/+64
2020-09-30drivers: reset: Add a managed API to get reset controllers from the DTJean-Jacques Hiblot1-4/+114
2020-09-18reset: Add IPQ40xx reset controller driverRobert Marko3-0/+182
2020-08-22treewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr()Masahiro Yamada1-1/+1
2020-08-04configs: reset: fu540: enable dm reset framework for SiFiveSagar Shrikant Kadam2-0/+10
2020-08-04sifive: reset: add DM based reset driver for SiFive SoC'sSagar Shrikant Kadam1-0/+118
2020-07-25treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada1-1/+1
2020-07-24Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini1-1/+1
generated by cgit v1.1 at 2024-11-10 13:35:14 +0000