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2019-12-02common: Move command functions out of common.hSimon Glass2-0/+2
Move these functions into the command.h header file which is a better fit. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move ARM cache operations out of common.hSimon Glass4-0/+4
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-03nand: mxs_nand: add API for switching different BCH layoutsIgor Opaniuk1-0/+116
On i.MX7 in a sake of reducing the disturbances caused by a neighboring cells in the FCB page in the NAND chip, a randomizer is enabled when reading the FCB page by ROM bootloader. Add API for setting BCH to specific layout (and restoring it back) used by ROM bootloader to be able to burn it in a proper way to NAND using nandbcb command. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Anti Sullin <anti.sullin@artecdesign.ee> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-10-30Merge tag 'u-boot-clk-23Oct2019' of ↵Tom Rini2-34/+0
https://gitlab.denx.de/u-boot/custodians/u-boot-clk - Add I2C clocks for i.MX6Q CCF driver - Fix check in clk_set_default_parents() - Managed API to get clock from device tree - Fixes for core clock code (including sandbox regression tests)
2019-10-25drivers: nand: brcmnand: fix nand_chip ecc layout structureWilliam Zhang1-156/+104
The current brcmnand driver is based on 4.18 linux kernel which uses mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from old kernel which does not use this new API and expect nand_chip.ecc.layout structure to be set. This cause nand_scan_tail function running into a bug check if the device has a different oob size than the default ones. This patch ports the brcmstb_choose_ecc_layout function from kernel 4.6.7 that supports the ecc layout struture and replaces the mtd_set_ooblayout method Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-10-25nand: brcm: add BCM6368 supportÁlvaro Fernández Rojas3-0/+124
This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-10-22drivers: clk: Add a managed API to get clocks from the device-treeJean-Jacques Hiblot2-34/+0
Add devm_clk_get(), devm_clk_get_optional() to get clocks from the device-tree. The clocks is automatically released and the data structure freed when the device is unbound. Also add devm_clk_put() to release the clock and free the data structure manually. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-08-25mtd: nand: raw: Move CONFIG_SYS_NAND_USE_FLASH_BBT to KconfigStefan Roese1-0/+5
Convert CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig, update defconfigs, headers and whitelist. Please note that this symbol already was used in Kconfig (imply in CONFIG_NAND_ATMEL) which did not work, since this symbol was not available in Kconfig. This changes now with this patch and all boards with CONFIG_NAND_ATMEL will have BBT enabled. Which is what I also need on my GARDENA AT91SAM based board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Gregory CLEMENT <gregory.clement@bootlin.com> [trini: Rework such that the configs are unchanged to start with] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-31nand: davinci: avoid out of bounds array accessHeinrich Schuchardt1-2/+2
The array bounds have to be checked before accessing the array element. Identified by cppcheck. Fixes: 67ac6ffaeefb ("mtd: nand: davinci: add opportunity to write keystone U-boot image") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-07-29nand: davinci: add support for driver modelBartosz Golaszewski1-1/+45
Extend the davinci NAND driver to support the driver model. For now this doesn't add any device-tree parsing due to the fact that we can't access the actual nand node on the device-tree - it's a subnode of the aemif device and we don't have an aemif driver on davinci at the moment. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-07-29nand: davinci: make davinci_nand_init() staticBartosz Golaszewski1-1/+1
This function is only used within the driver itself. No need to export it. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-07-19i.MX6: nand: add nandbcb command for imxShyam Saini4-76/+3
Writing/updating boot image in nand device is not straight forward in i.MX6 platform and it requires boot control block(BCB) to be configured. It becomes difficult to use uboot 'nand' command to write BCB since it requires platform specific attributes need to be taken care of. It is even difficult to use existing msx-nand.c driver by incorporating BCB attributes like mxs_dma_desc does because it requires change in mtd and nand command. So, cmd_nandbcb implemented in arch/arm/mach-imx BCB contains two data structures, Firmware Configuration Block(FCB) and Discovered Bad Block Table(DBBT). FCB has nand timings, DBBT search area, page address of firmware. On summary, nandbcb update will - erase the entire partition - create BCB by creating 2 FCB/DBBT block followed by 1 FW block based on partition size and erasesize. - fill FCB/DBBT structures - write FW/SPL on FW1 - write FCB/DBBT in first 2 blocks for nand boot, up on reset bootrom look for FCB structure in first block's if FCB found the nand timings are loaded for further reads. once FCB read done, DTTB will load and finally firmware will be loaded which is boot image. Refer section "NAND Boot" from doc/imx/common/imx6.txt for more usage information. Reviewed-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Sergey Kubushyn <ksi@koi8.net> Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
2019-07-12mtd: rawnand: stm32_fmc2: avoid warnings when building with W=1 optionPatrick Delaunay1-62/+31
This patch solves warnings detected by setting W=1 when building. Warnings type detected: - [-Wsign-compare] - [-Wtype-limits] Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-21mpc83xx: Migrate CONFIG_SYS_{BR, OR}*_PRELIM to KconfigMario Six1-0/+4
Migrate the BR/OR settings to Kconfig. These must be known at compile time, so cannot be configured via DT. Configuration of this crucial variable should still be somewhat comfortable. Hence, make its fields configurable in Kconfig, and assemble the final value from these. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-18CONFIG_SPL_SYS_[DI]CACHE_OFF: addTrevor Woerner1-1/+1
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-04nand: davinci: remove dead code for dm644xBartosz Golaszewski1-39/+0
The support for DaVinci DM* SoCs has been dropped. The code that used to be relevant to dm644x is no longer needed. Remove it. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-04-26mtd: nand: raw: Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behaviorGregory CLEMENT1-2/+2
The purpose of "mtd: nand: raw: allow to disable unneeded ECC layouts" was to allow disabling the default ECC layouts if a driver is known to provide its own ECC layout. However, this commit did the opposite and disabled the default layout when it was _not_ selected. It breaks all the NAND drivers not providing their own ECC layout this patch fix this situation. It was tested with the lpc32xx_nand_slc driver. Fixes: a38c3af868 ("mtd: nand: raw: allow to disable unneeded ECC layouts") Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-04-22drivers: nand: brcmnand: add an option to read the write-protect from device ↵Philippe Reynes1-0/+3
tree The option write-protect may only change on the kernel command line, we add a property in the device tree to be more flexible. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-22drivers: nand: brcmnand: add parameter parameter-page-big-endianPhilippe Reynes1-2/+15
The parameter page isn't always in big endian, so we add an option to choose the endiannes of the parameter page. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-22drivers: nand: brcmnand: add initial supportPhilippe Reynes10-0/+3334
The driver brcmnand come from linux kernel 4.18. Only SoC bcm6838 and bcm6858 are supported. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-22mtd: nand: provide several helpers to do common NAND operationsBoris Brezillon1-160/+853
Linux commit 97d90da8a88 ("mtd: nand: provide several helpers to do common NAND operations") This is part of the process of removing direct calls to ->cmdfunc() outside of the core in order to introduce a better interface to execute NAND operations. Here we provide several helpers and make use of them to remove all direct calls to ->cmdfunc(). This way, we can easily modify those helpers to make use of the new ->exec_op() interface when available. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [miquel.raynal@free-electrons.com: rebased and fixed some conflicts] Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> [Philippe Reynes: adapt code to u-boot and only keep new function] Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-17mtd: rawnand: denali: add reset handlingSimon Goldschmidt2-0/+17
This adds reset handling to the devicetree-enabled Denali NAND driver. For backwards compatibility, only a warning is printed when failing to get reset handles. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-04-14Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini1-32/+47
Conflicts: arch/arm/dts/armada-385-amc.dts arch/arm/dts/armada-xp-theadorable.dts arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-12mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driverChristophe Kerello3-0/+1104
The driver adds the support for the STMicroelectronics FMC2 NAND Controller found on STM32MP SOCs. This patch adds the polling mode, a basic mode that do not need any DMA channels. Only NAND_ECC_HW mode is actually supported. The driver supports a maximum 8k page size. The following ECC strength and step size are currently supported: - nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8) - nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4) - nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Extended ECC based on Hamming) This patch has been tested on Micron MT29F8G08ABACAH4. Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
2019-04-12mtd: spinand: Sync GigaDevice GD5F1GQ4UExxG with latest Linux versionStefan Roese1-32/+47
This patch sync's the U-Boot SPI NAND GigaDevice GD5F1GQ4UExxG support with the latest Linux version (v5.0-rc3) plus the chip supported posted on the MTD list. Only the currently in U-Boot available chip is supported with this sync. The changes for the GD5F1GQ4UExxG are: - Name of NAND device changed to better reflect the real part - OOB layout changed to only reserve 1 byte for BBT - Use ECC caps 8bits/512bytes instead of 8bits/2048bytes - Enhanced ecc_get_status() function to determine and report a more fine grained bit error status Signed-off-by: Stefan Roese <sr@denx.de> Cc: Boris Brezillon <bbrezillon@kernel.org> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2019-03-13MTD: mxs_nand_spl: Redo the way nand_init initializesAdam Ford1-11/+6
Currently the spl system calls nand_init which does nothing. It isn't until an attempt to load from NAND that it gets initialized. Subsequent attempts to load just skip the initialization because NAND is already initialized. This moves the contents of mxs_nand_init to nand_init. In the event of an error, it clears the number of nand chips found. Any attempts to use nand will check if there are nand chips available instead of actually doing the initialization at that time. If there are none, it will return an error to the higher level calls. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-02-15MTD: nand: mxs_nand: Allow driver to auto setup ECC in SPLAdam Ford1-3/+0
The initialization of the NAND in SPL hard-coded ecc.bytes, ecc.size, and ecc.strength which may work for some NAND parts, but it not appropriate for others. With the pending patch "mxs_nand: Fix BCH read timeout error on boards requiring ECC" the driver can auto configure the ECC when these entries are blank. This patch has been tested in NAND flash with oob 64 and oob 128. Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Jörg Krause <joerg.krause@embedded.rocks> Acked-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Tim Harvey <tharvey@gateworks.com>
2019-02-15MTD: NAND: mxs_nand_init_dma: Make mxs_nand_init_dma staticAdam Ford1-1/+1
mxs_nand_init_dma is only referenced from mxs_nand.c. It's not referenced in any headers or outside code, so this patch defines it as static. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-02-15MTD: mxs_nand: Fix BCH read timeout error on boards requiring ECCAdam Ford2-0/+7
The LogicPD board uses a Micron Flash with ECC. To boot this from SPL, the ECC needs to be correctly configured or the BCH engine times out. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Stefan Agner <stefan.agner@toradex.com> Tested-by: Jörg Krause <joerg.krause@embedded.rocks> Acked-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Tim Harvey <tharvey@gateworks.com>
2019-01-28MTD: nand: mxs_nand_spl: Fix empty function pointer for BBTAdam Ford1-0/+1
The initialization function calls a nand_chip.scan_bbt(mtd) but scan_bbt is never initialized resulting in an undefined function pointer. This will direct the function pointer to nand_default_bbt defined in the same file. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
2019-01-24mtd: nand: arasan_nfc: Add support for nand multi chip selectT Karthik Reddy2-14/+20
This patch adds support for nand multi chip select. Also adding CONFIG_SYS_NAND_MAX_CHIPS to Kconfig to specify maximum number of nand chips. Signed-off-by: Tummala Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-21ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to KconfigDerald D. Woods1-0/+38
This commit converts the following items to Kconfig: CONFIG_ATMEL_NAND_HWECC CONFIG_ATMEL_NAND_HW_PMECC CONFIG_PMECC_CAP CONFIG_PMECC_SECTOR_SIZE CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER [PMECC References] https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap [Mailing List Thread] https://lists.denx.de/pipermail/u-boot/2018-December/350666.html Fixes: 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment") [trini: Make the migration be size neutral and possibly not fix the above in all cases] Reported-by: Daniel Evans <photonthunder@gmail.com> Cc: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-16mtd: nand: raw: allow to disable unneeded ECC layoutsStefan Agner2-0/+11
Each ECC layout consumes about 2984 bytes in the .data section. Allow to disable the default ECC layouts if a driver is known to provide its own ECC layout. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-01-02Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini1-0/+4
2019-01-02mtd: nand: raw: Add Hynix H27UBG8T2BTR id tableNikolai Zhubr1-0/+4
This patch adds Hynix H27UBG8T2BTR id table as part of raw nand, these chips were available in some A20-olinuxino-micro boards. Signed-off-by: Nikolai Zhubr <n-a-zhubr@yandex.ru> [jagan: add proper commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-01Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imxTom Rini2-1/+59
imx for 2019.01 - introduce support for i.MX8M - fix size limit for Vhybrid / pico boards - several board fixes - w1 driver for MX2x / MX5x
2019-01-01nand: vybrid: Extend the vf610 NFC NAND driver to support device tree (and DM)Lukasz Majewski1-0/+47
This commit adds support for device tree and enumeration via device model for the Vybrid's NFC NAND driver. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-01-01Kconfig: Add entry for VF610 NAND NFC device tree aware driverLukasz Majewski1-0/+11
This commit provides code to add proper entry to Kconfig to enable support for VF610 device tree aware driver. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-01-01nand: vybrid: Use calloc() instead of malloc() to allocate struct nfcLukasz Majewski1-1/+1
Without this change it is possible that Vybrid's NFC driver malloc() call will obtain some memory used (and correctly free'd) by some previous driver (in this case pinctrl for Vybrid). As a result some fields of struct nfc - in out case mtd->_get_device - are "pre initialized" with some random values. On the latter stage of booting, when e.g. somebody calls 'mtdparts default' the "data abort" is observed when __get_mtd_device() function is called. The mtd->_get_device pointer is not NULL and wrong value is referenced. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
2018-12-29mtd: rawnand: denali: fix a race condition when DMA is kickedMasahiro Yamada1-0/+6
Based on Linux commit cf51e4b9c34407bf0c3d9b582b7837e047e1df47 Add the register read-back, commenting why this is necessary. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-29mtd: rawnand: denali: optimize timing parameters for data interfaceMasahiro Yamada3-24/+26
Based on Linux commit 1dfac31a5a63ac04a9b5fbc3f5105a586560f191 This commit improves the ->setup_data_interface() hook. The denali_setup_data_interface() needs the frequency of clk_x and the ratio of clk_x / clk. The latter is currently hardcoded in the driver, like this: #define DENALI_CLK_X_MULT 6 The IP datasheet requires that clk_x / clk be 4, 5, or 6. I just chose 6 because it is the most defensive value, but it is not optimal. By getting the clock rate of both "clk" and "clk_x", the driver can compute the timing values more precisely. To not break the existing platforms, the fallback value, 50 MHz is provided. It is true for all upstreamed platforms. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-29mtd: rawnand: denali_dt: add more clocks based on IP datasheetMasahiro Yamada1-3/+35
Based on Linux commit 6f1fe97bec349a1fd6c5a8c7c5998d759fe721d5 Currently, denali_dt.c requires a single anonymous clock, but the Denali User's Guide requires three clocks for this IP: - clk: controller core clock - clk_x: bus interface clock - ecc_clk: clock at which ECC circuitry is run This commit supports these named clocks to represent the real hardware. For the backward compatibility, the driver still accepts a single clock just as before. The clk_x_rate is taken from the clock driver again if the named clock "clk_x" is available. This will happen only for future DT, hence the existing DT files are not affected. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-05Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini1-19/+124
- Various MTD fixes from Boris - Zap various unused / legacy paths. - pxa3xx NAND update from Miquel Signed-off-by: Tom Rini <trini@konsulko.com>
2018-11-26mtd: nand: Arasan: Add subpage configuration supportMartin Lund1-0/+4
Add support for disabling subpage write support via CONFIG_SYS_NAND_NO_SUBPAGE_WRITE. Currently the Linux Arasan driver does not support subpage writes and in case of running UBI and accessing the same UBI volume from both U-Boot and Linux it is required to have the same subpage write configuration else the location of the UBI headers (EC + VID) will be misaligned (subpage vs page) and incompatible. Hence the need for disabling subpage write support in the U-Boot Arasan NAND driver. Signed-off-by: Martin Lund <malu@gomspace.com> Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-22mtd: rawnand: pxa3xx: fix 2kiB pages with 8b strength chips layoutMiquel Raynal1-9/+9
The initial layout for such NAND chips was the following: +----------------------------------------------------------------------------+ | 1024 (data) | 30 (ECC) | 1024 (data) | 30 (ECC) | 32 (free OOB) | 30 (ECC) | +----------------------------------------------------------------------------+ This layout has a weakness: reading empty pages trigger ECC errors (this is expected), but the hardware ECC engine tries to correct the data anyway and creates itself bitflips, hence bitflips are detected in erased pages while actually there are none in the NAND chip. Two solutions have been found at the same time. One was to enlarge the free OOB area to 64 bytes, changing the layout to be: +----------------------------------------------------------------------------+ | 1024 (data) | 30 (ECC) | 1024 (data) | 30 (ECC) | 64 (free OOB) | 30 (ECC) | +----------------------------------------------------------------------------+ ^^ The very big drawbacks of this solution are: 1/ It prevents booting from NAND. 2/ The current Linux driver (marvell_nand) does not have such problem because it already re-reads possible empty pages in raw mode before checking for bitflips. Using different layouts in U-Boot and Linux would simply not work. As this driver does support raw reads now and uses it to check for empty pages, let's forget about this broken hack and return to the initial layout with only 32 free OOB bytes. Fixes: ac56a3b30c ("mtd: nand: pxa3xx: add support for 2KB 8-bit flash") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-11-22mtd: nand: pxa3xx: re-read a page in raw mode on uncorrectable errorMiquel Raynal1-4/+23
This only applies on BCH path. When an empty page is read, it triggers an uncorrectable error. While this is expected, the ECC engine might produce itself bitflips in the read data under certain layouts. To overcome this situation, always re-read the entire page in raw mode and check for the whole page to be empty. Also report the right number of bitflips if there are any. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-11-22mtd: nand: pxa3xx: add raw read supportMiquel Raynal1-6/+92
Raw read support is added by editing a few code sections: ->handle_data_pio() includes the ECC bytes that are not consumed anymore by the ECC engine. ->prepare_set_command() is changed so that the ECC bytes are requested as part of the data I/O length. ->drain_fifo() shall also avoid checking the R/B pin too often when in raw mode. ->read_page_raw()/->read_oob_raw() are written from scratch. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-11-16mtd: nand: lpc32xx slc: disable DMA support in SPL buildsVladimir Zapolskiy1-46/+32
Testing and analysis shows that at the moment LPC32xx NAND SLC driver can not get PL080 DMA backbone support in SPL build, because SPL NAND loaders operate with subpage (ECC step to be precisely) reads, and this is not supported in the NAND SLC + DMA + hardware ECC calculation bundle. The change removes a cautious build time warning and explicitly disables DMA flavour of the driver for SPL builds, to reduce the amound of #ifdef sections the code blocks are minimally reorganized. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2018-11-16mtd: nand: lpc32xx mlc: predefine number of NAND chips to supportVladimir Zapolskiy1-0/+4
Build option CONFIG_SYS_MAX_NAND_CHIPS is used by NXP LPC32xx NAND MLC driver only, as a preparation for potential removal or replacement of the option the change predefines CONFIG_SYS_MAX_NAND_CHIPS to 1, same value is used by the single user Work Microwave Work 92105 board, thus it will be safe now to remove the option as a board specific one. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-10-22nand: atmel: Initialize pmecc smu with correct sizeBin Meng1-1/+1
Currently in pmecc_get_sigma(), the code tries to clear the memory pointed by smu with wrong size 'sizeof(int16_t) * ARRAY_SIZE(smu)'. Since smu is actually a pointer, not an array, so ARRAY_SIZE(smu) does not generate correct size to be cleared. In fact, GCC 8.1.0 reports a warning against it: error: division 'sizeof (int16_t * {aka short int *}) / sizeof (int16_t {aka short int})' does not compute the number of array elements [-Werror=sizeof-pointer-div] Fix it by using the correct size. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>