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AgeCommit message (Expand)AuthorFilesLines
2017-04-04rockchip: clk: rk3399: 24MHz is not a power of 2Philipp Tomsich1-2/+2
2017-04-04rockchip: clk: rk3399: add clocking support for EthernetPhilipp Tomsich1-0/+4
2017-04-04rockchip: clk: rk3399: fix warnings for unused variables in SPL/non-SPLPhilipp Tomsich1-0/+5
2017-04-04rockchip: clk: rk3188: Allow configuration of the armclkHeiko Stübner1-0/+63
2017-03-17Merge git://git.denx.de/u-boot-rockchipTom Rini6-10/+1196
2017-03-17stm32f7: clk: remove usart1 clock enable from board initVikas Manocha1-3/+0
2017-03-17clk: stm32f7: add clock driver for stm32f7 familyVikas Manocha2-1/+333
2017-03-16rockchip: rk3328: add clock driverKever Yang2-0/+582
2017-03-16rockchip: rk3188: Add clock driverHeiko Stübner2-0/+528
2017-03-16rockchip: clk: rk3288: limit gpll and cpll init to SPL buildHeiko Stübner1-0/+2
2017-03-16dm: allow limiting pre-reloc markings to spl or tplHeiko Stübner1-1/+2
2017-03-16rockchip: clk: rk3399: update driver for splKever Yang1-9/+82
2017-02-17clk: zynq: Add optional ethernet emio clock source supportStefan Herbrechtsmeier1-0/+29
2017-02-17clk: zynq: Add zynq clock framework driverStefan Herbrechtsmeier3-0/+468
2017-02-08Merge git://git.denx.de/u-boot-dmTom Rini5-10/+11
2017-02-08aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculationmaxims@google.com1-2/+2
2017-02-08dm: core: Replace of_offset with accessorSimon Glass5-10/+11
2017-01-29clk: uniphier: fix compatible strings for Pro5, PXs2, LD20 SD clockMasahiro Yamada1-3/+3
2017-01-28aspeed: Add basic ast2500-specific drivers and configurationmaxims@google.com3-0/+274
2017-01-10clk: zynqmp: Add clock driver support for zynqmpSiva Durga Prasad Paladugu3-0/+249
2016-11-25rockchip: clk: Support setting ACLKSimon Glass1-0/+7
2016-10-30rockchip: rk3288: Move rockchip_get_cru() out of the driverSimon Glass1-21/+0
2016-10-30rockchip: rk3399: Move rockchip_get_cru() out of the driverSimon Glass1-25/+1
2016-10-30rockchip: rk3036: Move rockchip_get_cru() out of the driverSimon Glass1-23/+1
2016-10-30clk: rk3399: fix rockchip_get_cruJacob Chen1-1/+3
2016-10-28clk: at91: Improve the clock implementationWenyou Yang6-89/+195
2016-10-28clk: clk-uclass: Assign clk->dev before call .of_xlateWenyou Yang1-0/+3
2016-10-28clk: at91: Fix at91-pmc and at91-sckc's class IDWenyou Yang2-20/+7
2016-10-18clk: uniphier: rework UniPhier clk driverMasahiro Yamada5-240/+179
2016-10-13libfdt: Bring in upstream stringlist functionsSimon Glass1-3/+3
2016-09-27clock: implement a driver for the Tegra CARStephen Warren3-0/+111
2016-09-22Merge git://git.denx.de/u-boot-rockchipTom Rini2-4/+175
2016-09-23clk: uniphier: allow to have clock node under syscon nodeMasahiro Yamada1-9/+9
2016-09-23clk: uniphier: move U_BOOT_DRIVER entry to core codeMasahiro Yamada3-75/+74
2016-09-23clk: uniphier: constify clock data arrays/structuresMasahiro Yamada3-9/+9
2016-09-22clk: rk3288: add PWM clock get rateKever Yang1-0/+2
2016-09-22clk: rk3399: add pmucru controller supportKever Yang1-4/+173
2016-09-21clk: boston: Providea simple driver for Boston board clocksPaul Burton3-0/+106
2016-08-15Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini16-0/+776
2016-08-15clk: at91: Add clock driverWenyou Yang16-0/+776
2016-08-15clock: add Tegra186 clock driverStephen Warren5-0/+118
2016-08-05rockchip: remove log2 reimplementation from clock driversHeiko Stübner2-14/+6
2016-08-05clock: rk3399: add support for dwmmc 400KKever Yang1-8/+21
2016-08-05move: rockchip: move clock drivers into a subdirectoryHeiko Stübner5-3/+10
2016-08-05rk3399: add basic soc driverKever Yang2-0/+820
2016-07-25rockchip: Use rockchip_get_clk() to obtain the SoC clockSimon Glass1-1/+1
2016-07-25rockchip: rk3288: fix FREF_MIN_HZ constantHeiko Stübner1-1/+1
2016-07-25cosmetic: rockchip: rk3288: rename rkclk_configure_cpuHeiko Stübner1-1/+1
2016-07-24ARM: uniphier: use (devm_)ioremap() instead of map_sysmem()Masahiro Yamada3-16/+7
2016-07-22dm: clk: Remove simple version of clk_get_by_index/name()Michal Simek1-27/+1