rocket-tools/riscv-gnu-toolchain/qemu/roms/u-boot.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-04-25	clk: renesas: Synchronize Gen2 MSTP teardown tables	Marek Vasut	3	-6/+6
2021-04-25	clk: renesas: Only ever access documented bits in clock driver teardown	Marek Vasut	7	-81/+81
2021-02-02	common: Drop asm/global_data.h from common header	Simon Glass	2	-0/+2
2020-12-13	dm: treewide: Rename auto_alloc_size members to be shorter	Simon Glass	15	-15/+15
2020-10-20	clk: renesas: Import R8A774C0 clock tables from Linux 5.9	Lad Prabhakar	3	-0/+315
2020-10-20	clk: renesas: Add R8A774E1 clock tables	Biju Das	3	-0/+365
2020-10-20	clk: renesas: Add R8A774B1 clock tables	Biju Das	3	-0/+343
2020-10-20	clk: renesas: r8a774a1-cpg-mssr: Add R8A774A1 RPC clock	Biju Das	1	-0/+4
2020-07-27	Merge tag 'dm-pull-20jul20-take2a' of https://gitlab.denx.de/u-boot/custodian...	Tom Rini	2	-2/+2
2020-07-25	treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()	Masahiro Yamada	2	-2/+2
2020-07-25	clk: renesas: Add R8A774A1 clock tables	Adam Ford	4	-0/+349
2020-07-24	Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"	Tom Rini	2	-2/+2
2020-07-20	treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()	Masahiro Yamada	2	-2/+2
2020-05-18	common: Drop linux/bitops.h from common header	Simon Glass	14	-0/+14
2020-05-18	common: Drop log.h from common header	Simon Glass	3	-0/+3
2020-03-30	clk: renesas: Switch to fdtdec_get_addr_size_auto_noparent() on Gen2	Marek Vasut	1	-1/+2
2019-08-09	clk: renesas: Add R8A77980 V3H clock tables	Marek Vasut	3	-0/+262
2019-04-09	clk: renesas: Synchronize Gen3 tables with Linux 5.0	Marek Vasut	8	-130/+215
2019-04-09	clk: renesas: Synchronize Gen2 tables with Linux 5.0	Marek Vasut	4	-16/+14
2019-04-09	clk: renesas: Add R8A77965 clock tables	Marek Vasut	4	-19/+346
2019-03-25	clk: renesas: Add support for setting MMCIF clock divider on Gen2	Marek Vasut	1	-0/+42
2019-03-25	clk: renesas: Fix swapped div and mul in debug output on Gen2	Marek Vasut	1	-1/+1
2019-03-25	clk: renesas: Fix SDH clock divider decoding on Gen2	Marek Vasut	1	-5/+9
2019-02-25	clk: rmobile: Drop def_bool per SoC	Marek Vasut	1	-10/+0
2018-12-03	clk: renesas: Allow reconfiguring SDHI clock on Gen3	Marek Vasut	1	-7/+3
2018-06-14	clk: rmobile: Add R8A77995 RPC clock	Marek Vasut	1	-0/+5
2018-06-14	clk: rmobile: Add R8A77990 RPC clock	Marek Vasut	1	-0/+5
2018-06-02	Merge branch 'master' of git://git.denx.de/u-boot-sh	Tom Rini	5	-32/+386
2018-06-01	clk: renesas: Add R8A77990 E3 clock tables	Marek Vasut	3	-0/+311
2018-06-01	clk: renesas: Add PE clock handling	Marek Vasut	2	-6/+40
2018-06-01	clk: renesas: Add PLL1 and PLL3 dividers	Marek Vasut	1	-4/+8
2018-06-01	clk: renesas: Pass clock rate around as 64bit number internally	Marek Vasut	1	-25/+31
2018-06-01	clk: renesas: Fix swapped arguments in debug message	Marek Vasut	1	-1/+1
2018-05-07	SPDX: Convert all of our single license tags to Linux Kernel style	Tom Rini	9	-18/+9
2018-05-02	clk: renesas: Drop USB extal from the R8A7792 clock driver	Marek Vasut	1	-2/+0
2018-04-21	clk: renesas: Minor clean up of the R8A7794 clock driver	Marek Vasut	1	-7/+3
2018-04-21	clk: renesas: Minor clean up of the R8A7792 clock driver	Marek Vasut	1	-7/+3
2018-04-13	clk: renesas: Minor clean up of the R8A7790 clock driver	Marek Vasut	1	-7/+3
2018-03-05	clk: renesas: Add R8A77965 M3N entries	Marek Vasut	1	-0/+19
2018-02-16	clk: rmobile: Assure SD-IF clock are configured correctly	Marek Vasut	1	-0/+2
2018-01-27	Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-sh	Tom Rini	16	-1104/+3094
2018-01-24	clk: renesas: Import R8A7794 E2 clock tables	Marek Vasut	3	-0/+284
2018-01-24	clk: renesas: Import R8A7792 V2H clock tables	Marek Vasut	3	-0/+257
2018-01-24	clk: renesas: Import R8A7791/R8A7793 M2 clock tables	Marek Vasut	3	-0/+308
2018-01-24	clk: renesas: Import R8A7790 H2 clock tables	Marek Vasut	3	-0/+303
2018-01-24	clk: renesas: Add Gen2 clock core	Marek Vasut	5	-0/+339
2018-01-24	clk: renesas: Add DIV6P1 clock type	Marek Vasut	1	-0/+6
2018-01-24	clk: renesas: Split out code shared between Gen2 and Gen3	Marek Vasut	4	-167/+203
2018-01-24	clk: renesas: Make clock tables Kconfig configurable	Marek Vasut	2	-5/+33
2018-01-24	clk: renesas: Split SMSTPCR and RMSTPCR tables	Marek Vasut	6	-30/+57