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AgeCommit message (Expand)AuthorFilesLines
2009-02-16fsl-ddr: Allow system to boot if we have more than 4G of memoryKumar Gala1-1/+1
2009-02-16fsl-ddr: ignore memctl_intlv_ctl setting if only one DDR controllerKumar Gala1-0/+4
2009-01-23fsl-ddr: use the 1T timing as default configurationDave Liu1-1/+1
2009-01-23fsl-ddr: make the self refresh idle threshold configurableDave Liu1-4/+8
2009-01-23fsl-ddr: clean up the ddr code for DDR3 controllerDave Liu1-11/+13
2009-01-23fsl-ddr: update the bit mask for DDR3 controllerDave Liu1-4/+8
2008-12-03fsl ddr skip interleaving if not supported.Ed Swarthout2-12/+17
2008-10-18Add debug information for DDR controller registersHaiying Wang1-0/+13
2008-10-18Check DDR interleaving modeHaiying Wang2-5/+112
2008-10-18Pass dimm parameters to populate populate controller optionsHaiying Wang4-87/+7
2008-10-18Make DDR interleaving mode work correctlyHaiying Wang2-12/+54
2008-10-18rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD1-7/+7
2008-09-13Coding style cleanup, update CHANGELOGWolfgang Denk1-15/+15
2008-09-07Fix compiler warning in mpc8xxx ddr codeKumar Gala1-2/+4
2008-08-27FSL DDR: Add DDR2 DIMM paramter supportKumar Gala1-0/+339
2008-08-27FSL DDR: Add DDR1 DIMM paramter supportKumar Gala1-0/+343
2008-08-27FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.Kumar Gala9-0/+2418
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