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AgeCommit message (Expand)AuthorFilesLines
2009-06-1285xx: Use print_size to report amount of memory not mapped by TLBsKumar Gala1-1/+1
2009-06-0985xx: bugfix for reading maximum TLB size on mpc85xxFredrik Arnerup1-1/+1
2009-04-0185xx: Introduce determine_mp_bootpg() helper.Kumar Gala3-23/+16
2009-03-30MPC85xx: Add MPC8569 CPU supportHaiying Wang3-0/+52
2009-03-3085xx: Add support for additional e500mc featuresKumar Gala4-1/+94
2009-03-30fsl-ddr: add the DDR3 SPD infrastructureDave Liu1-2/+4
2009-03-09Fix mpc85xx ddr-gen3 ddr_sdram_cfg.Ed Swarthout1-2/+2
2009-02-19Coding style cleanup, update CHANGELOGWolfgang Denk1-1/+2
2009-02-1685xx: Add eSDHC support for 8536 DSAndy Fleming1-0/+15
2009-02-1632bit BUg fix for DDR2 on 8572Poonam_Aggrwal-b108121-1/+8
2009-02-16mpc85xx: Add support for the P2020Srikanth Srinivasan2-0/+3
2009-02-1685xx: Fix how we map DDR memoryKumar Gala1-47/+27
2009-02-1685xx: Format cpu freq printing to handle 8 coresKumar Gala1-3/+5
2009-01-23Add secondary CPUs processor frequency for e500 coreHaiying Wang3-8/+24
2009-01-2385xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boardsKumar Gala1-4/+12
2009-01-2385xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boardsKumar Gala1-4/+12
2009-01-13Change DDR tlb start entry to CONFIG param for 85xxHaiying Wang1-1/+5
2008-12-19mpc8[56]xx: Put localbus clock in sysinfo and gdTrent Piepho2-26/+32
2008-12-19mpc8568: Double local bus clock dividerTrent Piepho1-2/+2
2008-12-1985xx: Fix the boot window issueDave Liu1-8/+8
2008-12-19Set IVPR to kenrel entry point in second core boot pageHaiying Wang1-0/+1
2008-12-19mpc8xxx: LCRR[CLKDIV] is sometimes five bitsTrent Piepho1-1/+1
2008-12-19mpc8[56]xx: Put localbus clock in device treeTrent Piepho1-1/+7
2008-12-1985xx: Add support to populate addr map based on TLB settingsKumar Gala1-0/+34
2008-12-06Update U-Boot's build timestamp on every compilePeter Tyser1-1/+2
2008-12-0485xx: init gd as early as possibleKumar Gala1-6/+6
2008-12-0485xx: Fix relocation of CCSRBARKumar Gala1-4/+5
2008-12-0485xx: Add PORDEVSR_PCI1 definePeter Tyser1-1/+1
2008-12-0385xx: Add CPU 2 errata workaround to all 8548 boardsPeter Tyser1-0/+13
2008-11-09Moved initialization of QE Ethernet controller to cpu_eth_init()Ben Warren1-0/+18
2008-11-09Moved initialization of FCC Ethernet controller to cpu_eth_initBen Warren1-1/+4
2008-11-09Fix typo in cpu/mpc85xx/cpu.cBen Warren1-1/+1
2008-10-2485xx: Fix the incorrect register used for DDR erratum1Dave Liu1-3/+6
2008-10-2485xx: Add basic e500mc core supportKumar Gala3-0/+14
2008-10-2485xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic numberKumar Gala1-2/+2
2008-10-21Use strmhz() to format clock frequenciesWolfgang Denk1-11/+15
2008-10-18Merge 'next' branchWolfgang Denk18-156/+221
2008-10-1885xx if NUM_CPUS>1, print cpu numberEd Swarthout1-0/+5
2008-10-18Have u-boot pass stashing parameters into device treeAndy Fleming1-0/+11
2008-10-1885xx: Export invalidate_{i,d}cache and add flush_dcacheKumar Gala1-0/+49
2008-10-18rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD18-156/+156
2008-10-17Revert "85xx: Using proper I2C source clock divider for MPC8544"Kumar Gala1-2/+2
2008-10-0885xx: Using proper I2C source clock divider for MPC8544Wolfgang Grandegger1-2/+2
2008-10-07Fix the incorrect DDR clk freq reporting on 8536DSJason Jin2-2/+4
2008-10-0785xx: Remove setting of *cache-line-size in device treesKumar Gala1-3/+0
2008-09-09Fix printf errors under -DDEBUGAndrew Klossner1-7/+7
2008-09-0985xx: Ensure timebase is zero on secondary coresKumar Gala1-0/+5
2008-09-08Removed hardcoded MxMR loop value from upmconfig() for MPC85xx.Sergei Poselenov1-8/+7
2008-09-02Pass in tsec_info struct through tsec_initializeAndy Fleming1-23/+10
2008-08-27mpc85xx: remove redudant code with lib_ppc/interrupts.cKumar Gala1-97/+12
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