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AgeCommit message (Expand)AuthorFilesLines
2012-07-07st_smi: Add support for SPEAr SMI driverVipin KUMAR1-115/+0
2012-07-07mtd/NAND: Remove obsolete SPEAr specific NAND driversVipin KUMAR1-57/+0
2012-07-07SPEAr: Configure FSMC driver for NAND interfaceVipin KUMAR1-4/+4
2012-07-07arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0Tetsuyuki Kobayashi1-1/+7
2012-07-07ARM: OMAP4/5: Move USB clocks to essential group.SRICHARAN R2-9/+7
2012-07-07ARM: OMAP4/5: Move gpmc clocks to essential group.SRICHARAN R2-2/+2
2012-07-07ARM: OMAP4+: Move external phy initialisations to arch specific place.SRICHARAN R4-27/+39
2012-07-07omap4: Use a smaller M,N couple for IVA DPLLSebastien Jan1-1/+1
2012-07-07omap: am33xx: accomodate input clocks other than 24 MhzSteve Sakoman1-5/+5
2012-07-07omap: emif: fix bug in manufacturer code testSteve Sakoman1-1/+1
2012-07-07omap: emif: deal with rams that return duplicate mr data on all byte lanesSteve Sakoman1-1/+6
2012-07-07OMAP4+: Force DDR in self-refresh after warm resetLokesh Vutla4-0/+27
2012-07-07OMAP4+: Handle sdram init after warm resetLokesh Vutla1-4/+6
2012-07-07ARM: OMAP3+: Detect reset typeLokesh Vutla8-0/+16
2012-07-07arm: bugfix: Move vector table before jumping relocated codeTetsuyuki Kobayashi1-0/+12
2012-07-07arm/kirkwood: protect the ENV_SPI #definesValentin Longchamp1-3/+9
2012-07-07kw_spi: support spi_claim/release_bus functionsValentin Longchamp1-0/+11
2012-07-07kirkwood: add save functionality kirkwood_mpp_conf functionValentin Longchamp2-2/+10
2012-07-07ATMEL/PIO: Enable new feature of PIO on Atmel deviceBo Shen1-1/+44
2012-07-07i.MX6 USDHC: Use the ESDHC clockMichael Langer1-0/+4
2012-07-07i.MX28: Add function to adjust memory parametersMarek Vasut1-0/+8
2012-07-07MX28: Fix a typo in mx28_reg_8 macroOtavio Salvador1-1/+1
2012-07-07mx53: Fix mask for SATA reference clockFabio Estevam1-1/+1
2012-07-07i.mx: i.mx6x: NO_MUX_I/NO_PAD_I not set correctlyJason Liu1-2/+2
2012-07-07EXYNOS5: PINMUX: Added default pinumx settingsRajeshwari Shinde4-1/+326
2012-07-07Exynos: fix cpuinfo and cpu detectingMinkyu Kang3-16/+37
2012-07-07ARM: OMAP4: Correct the lpddr2 io settings register value.SRICHARAN R1-1/+1
2012-07-07OMAP5: Change voltages for omap5432Lokesh Vutla2-10/+31
2012-07-07OMAP5: DPLL core lock for OMAP5432Lokesh Vutla4-6/+25
2012-07-07OMAP5: EMIF: Add support for DDR3 deviceLokesh Vutla4-4/+166
2012-07-07OMAP5: ADD precalculated timings for ddr3Lokesh Vutla3-1/+55
2012-07-07OMAP5: Configure the io settings for omap5432 uevm boardLokesh Vutla2-20/+93
2012-07-07OMAP5: ADD chip detection for OMAP5432 SOCLokesh Vutla3-2/+12
2012-07-07OMAP5: Adding correct Control id code for OMAP5430Lokesh Vutla1-1/+1
2012-07-07am33xx: Fix i2c sampling rate typoTom Rini1-1/+1
2012-07-07am33xx: Fill in more cm_wkuppll / cm_perpllTom Rini1-10/+30
2012-07-07am335x: Correct i2c sysc offsetTom Rini1-3/+3
2012-07-07DaVinci: fix ddr2 vtp i/o calibrationTroy Kisky1-4/+3
2012-07-07ARM: OMAP5: Correct the DRAM_ADDR_SPACE_END macro.SRICHARAN R1-1/+1
2012-07-07ARM: OMAP5: Align memory used for testing to the power of 2SRICHARAN R1-0/+3
2012-07-07ARM: OMAP5: dmm: Create a tiler trap section.SRICHARAN R1-3/+3
2012-07-07ARM: OMAP4+: dmm: Take care of overlapping dmm and trap sections.SRICHARAN R1-2/+18
2012-07-07am33xx: Do not call init_timer twiceTom Rini2-16/+16
2012-07-07arm: Tegra: Use ODMDATA from BCT in IRAMTom Warren2-1/+25
2012-07-07gpio: tegra2: rename tegra2_gpio.* to tegra_gpio.*Tom Warren1-3/+4
2012-07-07spi: tegra2: rename tegra2_spi.* to tegra_spi.*Tom Warren1-5/+4
2012-07-07tegra: override compiler flags for low level init codeamartin@nvidia.com1-2/+5
2012-07-07tegra: Correct PLL access in ap20.c and clock.cSimon Glass3-6/+9
2012-07-07tegra: add SDMMC1 on SDIO1 funcmux entryStephen Warren2-0/+8
2012-07-07tegra: add SDIO1 funcmux entry for UARTALucas Stach3-0/+8
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