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2019-12-15x86: Update .dtsi file for FSP2Simon Glass1-1/+31
2019-12-15x86: Disable microcode section for FSP2Simon Glass2-0/+11
2019-12-15x86: Add support for newer CAR schemesSimon Glass5-7/+564
2019-12-15x86: Add an option to include a FITSimon Glass2-0/+14
2019-12-15x86: Don't include the BIOS emulator in TPLSimon Glass1-0/+2
2019-12-15x86: fsp: Make the notify API call commonSimon Glass2-18/+27
2019-12-15x86: fsp: Allow remembering the location of FSP-SSimon Glass1-0/+3
2019-12-15x86: fsp: Set up an MTRR for the graphics frame bufferSimon Glass1-0/+4
2019-12-15x86: fsp: Add FSP2 base supportSimon Glass10-2/+784
2019-12-15x86: fsp: Correct wrong header inlude in fsp_support.cSimon Glass1-1/+1
2019-12-15x86: fsp: Make graphics support common to FSP1/2Simon Glass3-2/+4
2019-12-15x86: Allow interrupt to happen onceSimon Glass3-9/+11
2019-12-15x86: Set up the MTRR for SDRAMSimon Glass1-0/+5
2019-12-15x86: Set the DRAM banks to reflect real locationSimon Glass1-1/+29
2019-12-15x86: Move fsp_prepare_mrc_cache() to fsp1 directorySimon Glass3-27/+20
2019-12-15x86: Don't export mrccache_update()Simon Glass2-17/+14
2019-12-15x86: Add mrccache support for a 'variable' cacheSimon Glass2-1/+3
2019-12-15x86: Update mrccache to support multiple cachesSimon Glass8-48/+106
2019-12-15x86: Tidy up error handling in mrccache_save()Simon Glass1-12/+7
2019-12-15x86: Add a new global_data member for the cache recordSimon Glass2-6/+7
2019-12-15x86: Adjust mrccache_get_region() to support get_mmap()Simon Glass1-4/+14
2019-12-15x86: Adjust mrccache_get_region() to use livetreeSimon Glass1-29/+26
2019-12-15x86: Correct mrccache find_next_mrc_cache() calculationSimon Glass1-4/+14
2019-12-15x86: Reduce mrccache record alignment sizeSimon Glass1-1/+1
2019-12-15x86: Define the SPL image startSimon Glass1-1/+4
2019-12-15x86: Move UCLASS_IRQ into a separate fileSimon Glass1-5/+0
2019-12-15x86: Drop unnecessary interrupt code for TPLSimon Glass1-0/+2
2019-12-15x86: Drop unnecessary cpu code for TPLSimon Glass2-4/+41
2019-12-15x86: timer: use a timer base of 0Simon Glass2-0/+2
2019-12-15x86: spi: Add helper functions for Intel Fast SPISimon Glass4-0/+143
2019-12-15i2c: designware: Avoid using static dataSimon Glass1-0/+1
2019-12-08x86: simplify ljmp to 32-bit codeMasahiro Yamada1-3/+1
2019-12-08x86: use data32 directive instead of macro for operand-size prefixMasahiro Yamada1-5/+3
2019-12-02common: Move board_get_usable_ram_top() out of common.hSimon Glass11-0/+11
2019-12-02common: Move enable/disable_interrupts out of common.hSimon Glass1-0/+1
2019-12-02common: Move interrupt functions into a new headerSimon Glass5-0/+5
2019-12-02common: Move ARM cache operations out of common.hSimon Glass1-0/+1
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass4-0/+4
2019-12-02common: Move checkcpu() out of common.hSimon Glass11-0/+11
2019-11-03x86: Quieten TPL's jump_to_image_no_args()Simon Glass1-1/+1
2019-11-03x86: Don't print CPU info in TPLSimon Glass1-5/+0
2019-11-03x86: Move CPU init to before spl_init()Simon Glass3-0/+10
2019-11-03x86: Add a CPU init function for TPLSimon Glass2-0/+17
2019-11-03x86: tpl: Add a fake PCI busSimon Glass1-0/+25
2019-11-03x86: spl: Support init of a PUNITSimon Glass2-0/+41
2019-11-03x86: timer: Use a separate flag for whether timer is initedSimon Glass1-0/+1
2019-10-15binman: x86: Separate out 16-bit reset and init codeSimon Glass1-0/+9
2019-10-11x86: Reduce resetvec sizeSimon Glass1-3/+0
2019-10-11x86: Drop RESET_SEG_SIZESimon Glass2-6/+0
2019-10-11x86: Drop RESET_BASESimon Glass1-1/+0