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AgeCommit message (Expand)AuthorFilesLines
2023-05-11dm: Emit the arch_cpu_init_dm() even only before relocationSimon Glass1-1/+1
2023-04-20riscv: Support CONFIG_REMAKE_ELFSamuel Holland1-0/+2
2023-04-20riscv: Update alignment for some sections in linker scriptsBin Meng2-4/+4
2023-04-20riscv: spl: Remove relocation sectionsBin Meng2-25/+2
2023-04-20riscv: Avoid updating the link registerBin Meng1-1/+1
2023-04-20riscv: Change to use positive offset to access relocation entriesBin Meng1-12/+7
2023-04-20riscv: Optimize loading relocation typeBin Meng1-1/+0
2023-04-20riscv: Optimize source end address calculation in start.SBin Meng1-3/+1
2023-04-20riscv: Enforce DWARF4 outputBin Meng1-2/+1
2023-04-20riscv: Correct a comment in io.hBin Meng1-1/+1
2023-04-20riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device treeYanhong Wang6-1/+483
2023-04-20riscv: dts: jh7110: Add initial u-boot device treeYanhong Wang1-0/+99
2023-04-20riscv: dts: jh7110: Add initial StarFive JH7110 device treeYanhong Wang1-0/+573
2023-04-20board: starfive: Add TARGET_STARFIVE_VISIONFIVE2 to KconfigYanhong Wang1-0/+5
2023-04-20riscv: cpu: jh7110: Add Kconfig for StarFive JH7110 SoCYanhong Wang1-0/+28
2023-04-20riscv: cpu: jh7110: Add support for jh7110 SoCYanhong Wang6-0/+166
2023-03-06riscv: semihosting: replace inline assembly with assembly fileAndre Przywara2-24/+22
2023-02-27Merge tag 'v2023.04-rc3' into nextTom Rini14-265/+221
2023-02-17riscv: binman: Add help message for missing blobsRick Chen1-0/+1
2023-02-17riscv: Rename Andes cpu and board namesLeo Yu-Chi Liang7-5/+5
2023-02-17configs: ae350: Enable v5l2 cache for AE350 platforms in SPLYu Chien Peter Lin1-0/+1
2023-02-17riscv: ax25: cache.c: Cleanups to L1/L2 cache function used in SPLYu Chien Peter Lin1-30/+68
2023-02-17riscv: ae350: dts: Update L2 cache compatible stringYu Chien Peter Lin2-2/+2
2023-02-17riscv: cpu: ax25: Simplify cache enabling logic in harts_early_init()Yu Chien Peter Lin2-37/+43
2023-02-17riscv: Remove redundant Kconfig "RISCV_NDS_CACHE"Leo Yu-Chi Liang2-92/+2
2023-02-17riscv: global_data.h: Correct the comment for PLICSWYu Chien Peter Lin1-1/+1
2023-02-14dm: dts: Convert driver model tags to use new schemaSimon Glass7-71/+71
2023-02-10Correct SPL uses of LMBSimon Glass1-1/+1
2023-02-01riscv: memcpy: check src and dst before copyRick Chen1-0/+2
2023-02-01riscv: ax25: bypass malloc when spl fit boots from ramRick Chen2-0/+28
2023-02-01riscv: ae350: Enable CCTL_SUENRick Chen1-7/+11
2023-02-01riscv: cpu: check U-Mode before counteren writeNikita Shubin1-8/+8
2023-01-20global: Finish CONFIG -> CFG migrationTom Rini1-1/+1
2023-01-09Merge branch 'next'Tom Rini1-2/+0
2022-12-29efi_loader: set IMAGE_FILE_LARGE_ADDRESS_AWAREHeinrich Schuchardt1-5/+12
2022-12-22Convert CONFIG_STANDALONE_LOAD_ADDR to KconfigTom Rini1-2/+0
2022-12-08arch/riscv: add semihosting support for RISC-VKautuk Consul4-0/+52
2022-11-15riscv: clarify meaning of CONFIG_SBI_V02Heinrich Schuchardt1-7/+7
2022-11-15riscv: Fix detecting FPU support in standard extensionYu Chien Peter Lin1-3/+11
2022-11-15riscv: dts: fix the mpfs's reference clock frequencyConor Dooley2-8/+10
2022-11-03riscv: dts: Add QSPI NAND device nodePadmarao Begari1-0/+16
2022-11-03riscv: dts: Update memory configurationPadmarao Begari1-58/+17
2022-11-03riscv: Rename Andes PLIC to PLICSWYu Chien Peter Lin9-28/+28
2022-10-31Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASESimon Glass1-1/+1
2022-10-20riscv: andes_plic.c: use modified IPI schemeYu Chien Peter Lin1-3/+4
2022-10-20riscv: support building double-float modulesHeinrich Schuchardt2-3/+27
2022-10-07riscv: Fix build against binutils 2.38WIP/2022-10-07-riscv-toolchain-updateAlexandre Ghiti1-1/+10
2022-09-29dm: core: Drop ofnode_is_available()Simon Glass2-2/+2
2022-09-29treewide: Drop bootm_headers_t typedefSimon Glass1-4/+4
2022-09-26Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv ...Tom Rini6-11/+36