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2021-11-10Merge tag 'u-boot-stm32-20211110' of ↵WIP/10Nov2021Tom Rini16-312/+73
https://source.denx.de/u-boot/custodians/u-boot-stm - DHSOM update: - Remove nWP GPIO hog - Increase SF bus frequency to 50Mhz and enable SFDP - Disable video output for DHSOM - Disable EFI - Enable DFU_MTD support - Create include file for STM32 gpio driver private data - Split board and SOC STM32MP15 configuration - Device tree alignement with v5.15-rc6 for STM32MP15 - Add binman support for STM32MP15x - Normalise newlines for stm32prog - Update OTP shadow registers in SPL
2021-11-10stm32mp15: tidy up #ifdefs in cpu.cPatrick Delaunay1-19/+15
We should avoid #ifdef in C modules and the unused functions are eliminated by the linker. Use the more readable IS_ENABLE() instead. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10stm32mp15: replace CONFIG_TFABOOT when it is possiblePatrick Delaunay2-18/+12
In some part of STM32MP15 support the CONFIG_TFABOOT can be replaced by other config: CONFIG_ARMV7_PSCI and CONFIG_ARM_SMCCC. This patch also simplifies the code in cpu.c, stm32mp1_ram.c and clk_stml32mp1.c as execution of U-Boot in sysram (boot without SPL and without TFA) is not supported: the associated initialization code is present only in SPL. This cleanup patch is a preliminary step to support SPL load of OP-TEE in secure world, with SPL in secure world and U-Boot in no-secure world. Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10stm32mp15: remove configs dependency on CONFIG_TFABOOTPatrick Delaunay1-6/+2
Remove the dependency on CONFIG_TFABOOT in stm32mp Kconfig - always activate the ARCH config: CONFIG_ARCH_SUPPORT_PSCI and CONFIG_CPU_V7_HAS_NONSEC - CONFIG_ARMV7_NONSEC is deactivated in trusted defconfig - the correct sysreset driver is activated in each defconfig: CONFIG_SYSRESET_PSCI or SYSRESET_SYSCON Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10arm: stm32mp: bsec: Update OTP shadow registers in SPLPatrick Delaunay2-3/+10
Currently the upper OTP (after 57) are shadowed in U-Boot proper, when TFABOOT is not used. This choice cause an issue when U-Boot is not executed after SPL, so this BSEC initialization is moved in SPL and no more executed in U-Boot, so it is still executed only one time. After this patch this BSEC initialization is done in FSBL: SPL or TF-A. To force this initialization in all the case, the probe of the BSEC driver is forced in SPL in the arch st32mp function: spl_board_init(). Even if today BSEC driver is already probed in STM32MP15x clock driver clk_stm32mp1.c because get_cpu_type() is called in stm32mp1_get_max_opp_freq() function. Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10ARM: dts: stm32: Drop nWP GPIO hog on DHSOMMarek Vasut2-18/+0
The nWP GPIO hog was used to unlock the SPI NOR write protect when U-Boot used to operate the SPI NOR in 1-1-1 mode. Now that the SPI NOR is operated in 1-1-4 mode, the hog has adverse effects and causes transfer corruption, since the hogged pin is also the IO2 pin. Remove the hogs. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10gpio: stm32: create include file for driver private dataPatrick Delaunay6-214/+0
The stm32 gpio driver private data are not needed in arch include files, they are not used by code except for stm32 gpio and pincontrol drivers, using the same IP; the defines for this IP is moved in a new file "stm32_gpio_priv.h" in driver/gpio. This patch avoids to have duplicated file gpio.h for each SOC in MPU directory mach-stm32mp and in each MCU directory arch-stm32* and allows to remove CONFIG_GPIO_EXTRA_HEADER for all STM32. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-10arm: dts: stm32mp15: alignment with v5.15-rc6Patrick Delaunay2-8/+8
Device tree alignment with Linux kernel v5.15-rc6 - Set {bitclock,frame}-master phandles on ST DKx - Add coprocessor detach mbox on stm32mp15x-dkx boards - Add coprocessor detach mbox on stm32mp157c-ed1 board Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-11-10stm32mp: add binman support for STM32MP15xPatrick Delaunay3-29/+30
Use binman to add the stm32image header on SPL binary for basic boot or on U-Boot binary when it is required, i.e. for TF-A boot without FIP support, when CONFIG_STM32MP15x_STM32IMAGE is activated. The "binman" tool is the recommended tool for specific image generation. This patch allows to suppress the config.mk file and it is a preliminary step to manage FIT generation with binman. The init_r parsing of U-Boot device tree to search the binman information is not required for STM32MP15, so the binman library can be removed in U-Boot (CONFIG_BINMAN_FDT is deactivated). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-10stm32mp: stm32prog: Normalise newlinesWilliam Grant1-2/+1
The missing trailing newline could confuse check-config.sh if the definition of an option was on the first line of the next file that find(1) happened to return. Signed-off-by: William Grant <wgrant@ubuntu.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-09exynos: mmu: use CONFIG_IS_ENABLEDMinkyu Kang1-5/+6
to fix following checkpatch warnings. Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef' where possible Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Cc: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-11-05Convert CONFIG_SYS_HZ to KconfigTom Rini1-1/+0
This converts the following to Kconfig: CONFIG_SYS_HZ Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-05spl: Make use of CONFIG_IS_ENABLED(OS_BOOT) in SPL/TPL common code pathsTom Rini1-1/+1
When building a system that has both TPL and SPL_OS_BOOT, code which tests for CONFIG_SPL_OS_BOOT will be built and enabled in TPL, which is not correct. While there is no CONFIG_TPL_OS_BOOT symbol at this time (and likely will not ever be) we can use CONFIG_IS_ENABLED(OS_BOOT) in these common paths to ensure we only compile these parts in the SPL case. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-04sunxi: Use sysreset framework for poweroff/resetSamuel Holland1-0/+3
Instead of hardcoding the watchdog for reset, and the PMIC for poweroff, use the sysreset framework to manage the available poweroff/reset backends. This allows (as examples) using the PMIC to do a cold reset, and using a GPIO to power off H3/H5 boards lacking a PMIC. Furthermore, it removes the need to hardcode watchdog MMIO addresses, since the sysreset backends can be discovered using the device tree. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-04sunxi: Avoid duplicate reset_cpu with SYSRESET enabledSamuel Holland1-0/+2
The sysreset uclass unconditionally provides a definition of the reset_cpu() function. So does the sunxi board code. Fix the build with SYSRESET enabled by omitting the function from the board code in that case. The code still needs to be kept around for use in SPL. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-02Merge tag 'u-boot-amlogic-20211102' of ↵WIP/02Nov2021Tom Rini1-1/+67
https://source.denx.de/u-boot/custodians/u-boot-amlogic - add sm efuse write support and cmd for read/write efuse - add JetHub D1 eth mac generation with manufacturer OUI
2021-10-31Merge https://source.denx.de/u-boot/custodians/u-boot-shTom Rini1-12/+10
- rzg2_beacon updates
2021-10-31board: samsung: add support for Galaxy A series of 2017 (a5y17lte)Dzmitry Sankouski3-0/+60
Samsung Galaxy A3, A5, A7 (2017) - middle class Samsung smartphones. U-boot can be used as chain-loaded bootloader to gain control on booting vanilla linux(and possibly others) kernels Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Minkyu Kang <mk7.kang@samsung.com>
2021-10-31SoC: exynos: add support for exynos 78x0Dzmitry Sankouski4-0/+648
Samsung Exynos 7880 \ 7870 - SoC for mainstream smartphones and tablets introduced on March 2017. Features: - 8 Cortex A53 cores - ARM Mali-T830 MP3 GPU - LTE Cat. 7 (7880) or 6 (7870) modem Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Minkyu Kang <mk7.kang@samsung.com>
2021-10-31board: samsung: add Samsung Galaxy S9/S9+(SM-G96x0) boardDzmitry Sankouski4-0/+110
Samsung S9 SM-G9600 - Snapdragon SDM845 version of the phone, for China \ Hong Kong markets. Has unlockable bootloader, unlike SM-G960U (American market version), which allows running u-boot as a chain-loaded bootloader. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2021-10-31SoC: qcom: add support for SDM845Dzmitry Sankouski6-0/+279
Hi-end qualcomm chip, introduced in late 2017. Mostly used in flagship phones and tablets of 2018. Features: - arm64 arch - total of 8 Kryo 385 Gold / Silver cores - Hexagon 685 DSP - Adreno 630 GPU Tested only as second-stage bootloader. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Tom Rini <trini@konsulko.com> Cc: Stephan Gerhold <stephan@gerhold.net>
2021-10-31clocks: qcom: add clocks for SDM845 debug uartDzmitry Sankouski3-1/+95
Allows to change clock frequency of debug uart, thus supporting wide range of baudrates. Enable / disable functionality is not implemented yet. In most use cases of SDM845 (i.e. mobile phones and tablets) it's not needed, because qualcomm first stage bootloader leaves it initialized, and on the other hand there's no possibility to replace signed first stage bootloader with u-boot. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2021-10-31pinctrl: qcom: add pinctrl and gpio drivers for SDM845 SoCDzmitry Sankouski3-0/+48
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephan Gerhold <stephan@gerhold.net> [trini: Add CONFIG_SDM845 around sdm845_data usage]
2021-10-31arm: dts: apple: Add preliminary device treesMark Kettenis4-0/+796
Add preliminary device trees for the Apple M1 mini (2020) and Apple M1 Macbook Pro 13" (2020). Device tree bindings for the Apple M1 SoC are still being formalized and these device trees will be synchronized with the Linux kernel as needed. The device trees in this commit are based on the initial Apple M1 device trees from Linux 5.13, nodes for dart, pcie, pinctrl, pmgr, usb based on bindings on track for inclusion in Linux 5.15 and 5.16 and nodes for i2c, mailbox, nvme, pmu, spmi and watchdog that don't have a proposed binding yet. These device trees are provided as a reference only as U-Boot uses the device tree passed by the m1n1 bootloader. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31iommu: Add Apple DART driverMark Kettenis1-0/+1
The DART is an IOMMU that is used on Apple's M1 SoC. This driver configures the DART such that it operates in bypass mode which is enough to support DMA for the USB3 ports integrated on the SoC. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31serial: s5p: Add Apple M1 supportMark Kettenis2-0/+42
Apple M1 SoCs include an S5L UART which is a variant of the S5P UART. Add support for this variant and enable it by default on Apple SoCs. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31arm: apple: Add initial support for Apple's M1 SoCMark Kettenis6-0/+223
Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-31arm: mvebu: Fix booting from SATAPali Rohár1-2/+2
Use proper SATA macro for boot_device switch in spl_boot_device() function. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 2226ca173486 ("arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage header")
2021-10-31Revert "arch: arm: use dt and UCLASS_SYSCON to get gic lpi details"Michael Walle4-63/+36
Stop using the device tree as a source for ad-hoc information. This reverts commit 2ae7adc659f7fca9ea65df4318e5bca2b8274310. Signed-off-by: Michael Walle <michael@walle.cc> [trini: Also make board/broadcom/bcmns3/ns3.c fail clearly now] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-30Revert "arm64: Layerscape: Survive LPI one-way reset workaround"Tom Rini5-41/+1
Ad-hoc bindings that are not part of the upstream device tree / bindings are not allowed in-tree. Only bindings that are in-progress with upstream and then re-synced once agreed upon are. This reverts commit af288cb291da3abef6be0875527729296f7de7a0. Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Reported-by: Michael Walle <michael@walle.cc> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Marc Zyngier <maz@kernel.org>
2021-10-29ARM: rmobile: beacon: Enable reference clocks for USB and AVBAdam Ford1-0/+2
Both Ethernet and USB drivers get their reference clocks from the versaclock. Enable that driver and the common clock driver by default. Signed-off-by: Adam Ford <aford173@gmail.com>
2021-10-29ARM: rmobile: beacon: Remove duplicated for RZ/G2 M/N/HAdam Ford1-13/+1
Now that TARGET_BEACON_RZG2M can handle all the work that was done with TARGET_BEACON_RZG2N and TARGET_BEACON_RZG2H, remove them since they just create more duplicate code. Signed-off-by: Adam Ford <aford173@gmail.com>
2021-10-29ARM: rmobile: beacon: Support RZ/G2 [M/N/H] on TARGET_BEACON_RZG2MAdam Ford1-0/+8
The three different boards share the same board file and only differ in terms of which SoC is being used. By enabling FIT on TARGET_BEACON_RZG2M, it can support all three boards and elimate duplicate code. Signed-off-by: Adam Ford <aford173@gmail.com>
2021-10-29ARM: amlogic: add sm efuse write support and cmd for read/write efuseVyacheslav Bocharov1-1/+67
This adds support for amlogic efuse write and provides two subcommands of "sm" command: "efuseread" and "efusewrite" to read/write bytes between memory and efuse. Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in> [narmstrong: fixed indent at end of patch] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-28Merge https://source.denx.de/u-boot/custodians/u-boot-marvellWIP/28Oct2021Tom Rini3-3/+12
- mvebu: Fix usage of BIN header arguments (Pali) - mvebu: turris_omnia: Fix MTD partitions order for Linux (Pali) - mvebu: nandpagesize support for kwbimage v1 (Pali)
2021-10-28arm: mvebu: Fix comments about kwbimage structuresPali Rohár1-1/+1
kwbimage v1 is used on more SoCs. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28arm: mvebu: Update name of kwbimage v1 field at offset 0x2-0x3Pali Rohár1-1/+1
At this offset is stored nand page size. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28arm: mvebu: Remove dummy BIN header arguments for SPL binaryPali Rohár1-1/+1
U-Boot SPL binary does not read BIN header arguments, so passing some dummy values 0000005b and 00000068 has no effect for U-Boot SPL code. Probably these two values comes from old Marvell DDR training code which was separated from U-Boot and used it for some configuration. Seems that two 32-bit values were specified here to ensure SPL code alignment to 128-bit boundary as it is required e.g. for A370 or AXP processors. Main kwbimage header is 64-byte long which is aligned to 128-bit boundary. Optional kwbheader is 32-bit long, number of BIN header arguments is stored in 32-bit number. So for alignment to 128-bit boundary is needed 64-bit padding which exactly these two 32-bit dummy arguments provided. Now when mkimage correctly aligns start of executable code in BIN header to 128-bit boundary, there is no requirement to put dummy argument values into kwbimage. So remove them. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28arm: mvebu: Add documentation for save_boot_params() functionPali Rohár1-0/+9
Important detail is availability of kwbimage BIN header arguments passed via r0 and r1 registers by BootROM. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-27sandbox: Remove OF_HOSTFILEWIP/27Oct2021Ilias Apalodimas1-1/+2
OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-25arm: spl: prepare for jumping to OPTEERicardo Salveti1-0/+11
Make sure to (if applicable) flush the D-cache, invalidate I-cache, and disable MMU and caches before jumping to OPTEE. This fixes the SDP->SPL->OPTEE boot flow on iMX6Q and most likely on some other ARM SoCs. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2021-10-25Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiWIP/25Oct2021Tom Rini4-4/+11
- Add and enable watchdog driver - Prepare for SYSRESET driven AXP poweroff - Prepare for SoCs without MMC2 - Some fixes for extending SPL (SPL-DM for RISC-V) - Some preparations for proper VBUS management - Fix secure monitor move
2021-10-25sunxi: only include alias for eMMC when mmc2 usedIcenowy Zheng1-0/+2
Some Allwinner SoCs (e.g. R329) doesn't have a MMC2 controller at all, and on boards that we do not utilize MMC2, the alias for it is just useless. Only include the alias when we specify CONFIG_MMC_SUNXI_EXTRA_SLOT to 2. Signed-off-by: Icenowy Zheng <icenowy@sipeed.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25sunxi: dts: H616: Enable the watchdogSamuel Holland1-1/+0
For some reason, the watchdog was disabled in the H616 device tree. Most likely this is a copy-paste from the H6 device tree: the H6 watchdog is disabled because it is broken in some chips. However, there is no evidence of issues with the H616 watchdog. Enable the watchdog node so it can be used by the driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25Merge tag 'u-boot-imx-20211022' of ↵Tom Rini16-52/+508
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20211022 ------------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/9561 - i.MX8: - Toradex Verdin (switch to binman, cleanup, etc.) - Phytec phycore_imx8mm (fixes, boot from SPI-NOR) - fixes for imx8mp_evk - doc (i.MX): MX8MM with Fast boot - i.MX6: - Toradex : colibri-imx6ull with eMMC, fixes - i.MX7ULP : - preparation for OPTEE + Serial Number - generic: - imx8m_image: Support ddr3 firmware
2021-10-25sunxi: Enable watchdog timer support by defaultSamuel Holland1-0/+1
A watchdog helps recover from hangs or failure to boot an OS. It can also be used by the sysreset framework to intentionally reset the system. Now that a driver is available, let's enable this functionality on sunxi boards. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25sunxi: SPL SPI: Allow larger SPLAndre Przywara1-3/+7
The more recent Allwinner SoCs BootROMs can actually load SPL images larger than 32KB. We use this on the H616 to fit the extra code needed for the PMIC into the image, and have provisions in board.c to respect that larger SPL size when booting from MMC. However the sunxi SPL SPI loader has a hardcoded load offset of 32KB, which will fail on the H616. To fix this, use the same algorithm we use for MMC: if the SPL size is smaller than 32KB, we use 32KB, otherwise we expect the U-Boot payload directly after the SPL code. This prepares for SPI booting with larger SPLs like on the H616. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-25sunxi: Select SPL_SEPARATE_BSSSamuel Holland1-0/+1
sunxi-common.h defines CONFIG_SPL_BSS_START_ADDR to put SPL's BSS in DRAM. Due to this, we must select SPL_SEPARATE_BSS, or else SPL will attempt to load its DTB from the wrong address (after BSS in DRAM). This change fixes booting with SPL_OF_CONTROL=y. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-21mx7ulp: add getting a board serial numberRicardo Salveti1-0/+23
Get Unique ID of SoC iMX7ULP, using the logic described in Fusemap (IMX7ULPRMB2_Rev0_Fusemap) attached in the i.MX 7ULP APRM [1]. [1] https://www.nxp.com/docs/en/reference-manual/IMX7ULPRMB2.pdf Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-21arm: dts: imx8mp: Delete default clocks for clock controller nodeYe Li1-0/+3
Since SPL has initialized clocks for bus and core. We don't need to set the default clocks for clock controller node. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Teresa Remmet <t.remmet@phytec.de> Tested-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Acked-by: Peng Fan <peng.fan@nxp.com>
generated by cgit v1.1 at 2024-08-03 22:53:24 +0000