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| author | Patrick Delaunay <patrick.delaunay@foss.st.com> | 2021-10-11 09:52:48 +0200 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@foss.st.com> | 2021-11-10 17:06:51 +0100 |
| commit | 9788708f030b20ecb07b718d07fb98e3bae66cb0 (patch) | |
| tree | db129f4e2aa0f6a04e0a9b47774a40c52e77f1a3 /arch/arm | |
| parent | 819408d001d4f8701eb2155c461bb0dbd20af525 (diff) | |
| download | u-boot-9788708f030b20ecb07b718d07fb98e3bae66cb0.zip u-boot-9788708f030b20ecb07b718d07fb98e3bae66cb0.tar.gz u-boot-9788708f030b20ecb07b718d07fb98e3bae66cb0.tar.bz2 | |
arm: stm32mp: bsec: Update OTP shadow registers in SPL
Currently the upper OTP (after 57) are shadowed in U-Boot proper,
when TFABOOT is not used.
This choice cause an issue when U-Boot is not executed after SPL,
so this BSEC initialization is moved in SPL and no more executed in U-Boot,
so it is still executed only one time.
After this patch this BSEC initialization is done in FSBL: SPL or TF-A.
To force this initialization in all the case, the probe of the BSEC
driver is forced in SPL in the arch st32mp function: spl_board_init().
Even if today BSEC driver is already probed in STM32MP15x clock driver
clk_stm32mp1.c because get_cpu_type() is called in
stm32mp1_get_max_opp_freq() function.
Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-stm32mp/bsec.c | 5 | ||||
| -rw-r--r-- | arch/arm/mach-stm32mp/cpu.c | 8 |
2 files changed, 10 insertions, 3 deletions
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index fe39bd8..e517acd 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -503,10 +503,9 @@ static int stm32mp_bsec_probe(struct udevice *dev) /* * update unlocked shadow for OTP cleared by the rom code - * only executed in U-Boot proper when TF-A is not used + * only executed in SPL, it is done in TF-A for TFABOOT */ - - if (!IS_ENABLED(CONFIG_TFABOOT) && !IS_ENABLED(CONFIG_SPL_BUILD)) { + if (IS_ENABLED(CONFIG_SPL_BUILD)) { plat = dev_get_plat(dev); for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++) diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index eb79f3f..0263ffe 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -174,7 +174,15 @@ static void dbgmcu_init(void) void spl_board_init(void) { + struct udevice *dev; + int ret; + dbgmcu_init(); + + /* force probe of BSEC driver to shadow the upper OTP */ + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(stm32mp_bsec), &dev); + if (ret) + log_warning("BSEC probe failed: %d\n", ret); } #endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */ |