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2024-09-19imx9: trdc: cleanup codePeng Fan1-0/+5
Replace magic number with meaningful macros. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx: Generalize fixup_thermal_tripsPeng Fan1-0/+1
i.MX8M and i.MX9 have duplicated fixup_thermal_trips, so move it to arch/arm/mach-imx/fdt.c to avoid duplicated code. The critial temperature point for i.MX9 set to "maxc - 5" back to give some margin. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx93: Add Low performance parts 9302/9301 supportYe Li2-1/+6
Add support for iMX93 low performance parts 9302 and 9301 which restrict to low drive voltage only. The parts run A55 max speed at 900Mhz and M33 at 133Mhz, have NPU and A55 core1 (9301) disabled. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx: Generalize disable_cpu_nodesPeng Fan1-0/+2
disable_cpu_nodes could be reused by i.MX9, so move disable_cpu_nodes out from mach-imx/imx8m/soc.c to mach-imx/fdt.c and update disable_cpu_nodes to make it easy to support different socs. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: clock: Update clock init function and sequenceYe Li1-1/+2
Since we use SPEED GRADE fuse to set A55 frequency, remove the set_arm_core_low_drive_clk function which has hard coded frequency. And adjust clock_init called sequence and split it to early and late functions. Set the authen register in early function, because CCF driver checks NS bit. Set bus and core clock in late function, because the fuse read and SoC type/rev depend on ELE. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: soc: Add function to get target voltage modeYe Li1-0/+11
Replace the static CONFIG_IMX9_LOW_DRIVE_MODE with runtime target voltage mode by checking the part's SPEED GRADE fuse. SPL will configure to highest A55 speed which is indicated by the SPEED fuse and select corresponding voltage mode. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: soc: Change FSB directly access to fuse APIPeng Fan1-0/+3
To support OSCCA enabled part which has disabled FSB access from SOC, change directly read from FSB to use fuse_read API. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: soc: Configure TRDC for M33 TCM accessYe Li1-0/+1
On OSCCA part, M33 TCM is used for ROM PATCH and protected by ELE ROM. So after release TRDC, we need to configure TRDC for M33 TCM, otherwise A55 can't access the TCM. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
2024-09-19imx9: soc: wait ssar when power on power domainPeng Fan1-0/+1
SSAR handshake done means power on finished, not ISO done. so correct the waiting mask. Fixes: 0256577a83b ("imx: imx9: Add MIX power init") Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-06armv8: mmu: add a way to map additional regionsCaleb Connolly1-0/+10
In some cases we might want to map some memory region after enabling caches. Introduce a new helper for this. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-08-30imx: ele_ahab: Add HUK derivation supportMathieu Othacehe1-0/+2
Add a new ahab_derive command that derives the hardware unique key (HUK) into a 16 or 32 bytes key and stores it at the given address. Signed-off-by: Mathieu Othacehe <othacehe@gnu.org> Reviewed-by: Ye Li <ye.li@nxp.com>
2024-08-23rockchip: Move the default timer init to a common fileSimon Glass1-0/+3
Rather than repeating the same code in two files (SPL and TPL), move it to a shared filed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2024-08-06am33xx: Use regular spl_board_init instead of am33xx_spl_board_initPaul Kocialkowski1-1/+0
The am33xx_spl_board_init function was introduced as a way to add board-specific SPL init for AM33xx devices since the spl_board_init function was already used for SoC-specific init. Now that the SoC-specific SPL init was moved to spl_soc_init, we can use spl_board_init for this purpose and get rid of am33xx_spl_board_init. Rename the function in board files and enable the related config option for concerned boards. Signed-off-by: Paul Kocialkowski <paulk@sys-base.io> Reviewed-by: Tom Rini <trini@konsulko.com>
2024-07-23arm: ti: Remove omap4 platform supportTom Rini13-1137/+8
There are no longer any OMAP4 platforms in U-Boot, remove the related functionality. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-07-18Merge tag 'u-boot-rockchip-20240718' of ↵Tom Rini2-0/+4
https://source.denx.de/u-boot/custodians/u-boot-rockchip - Add boards: rk3328: Radxa ROCK Pi E v3; rk3588s: FriendlyElec NanoPi R6C/S; - Remove board: Theobroma Systems RK3368 Lion; - Add rk3588 pcie support; - Misc updates for board and config; CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/2163
2024-07-17rockchip: include cru_rk3588.h and define rockchip_cru for RK3588FUKAUMI Naoki2-0/+4
fix following error found by clang: CC arch/arm/mach-rockchip/cpu-info.o arch/arm/mach-rockchip/cpu-info.c:23:13: error: incomplete definition of type 'struct rockchip_cru' 23 | switch (cru->glb_rst_st) { | ~~~^ ./arch/arm/include/asm/arch-rockchip/clock.h:181:8: note: forward declaration of 'struct rockchip_cru' 181 | struct rockchip_cru; | ^ 1 error generated. Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-07-15arm: include: Remove duplicate newlinesMarek Vasut7-11/+0
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-07-15arm: include: tegra: Remove duplicate newlinesMarek Vasut3-5/+0
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-07-15arm: include: sunxi: Remove duplicate newlinesMarek Vasut5-7/+0
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-07-15arm: include: rockchip: Remove duplicate newlinesMarek Vasut2-2/+0
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-07-15arm: include: ti: Remove duplicate newlinesMarek Vasut5-5/+0
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-07-15arm: include: imx: Remove duplicate newlinesMarek Vasut13-22/+0
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-07-15arm: include: amlogic: Remove duplicate newlinesMarek Vasut1-1/+0
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-07-15arm: include: nxp: Remove duplicate newlinesMarek Vasut1-1/+0
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-07-15arm: include: hisilicon: Remove duplicate newlinesMarek Vasut3-4/+0
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-07-15arm: include: fsl: Remove duplicate newlinesMarek Vasut3-3/+0
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-07-01Merge tag 'u-boot-amlogic-20240701' of ↵Tom Rini2-29/+0
https://source.denx.de/u-boot/custodians/u-boot-amlogic into next - Switch meson dwc3/usb PHY to set_mode callback for switching USB mode
2024-06-26Merge patch series "arm64: add a software pagetable walker"Tom Rini1-1/+57
Caleb Connolly <caleb.connolly@linaro.org> says: MMU issues are some of the most frustrating to debug. To make this slightly less unbearable, introduce a software pagetable walker for ARMv8. This can be called to dump a pagetable with the default formatter, or a custom callback can be provided to implement more complicated parsing. This can also be useful to dump the pagetable used by a previous bootloader stage (by reading out the ttbr register). Here is an example of the output when walking U-Boot's own memory map on a Qualcomm RB3 board: Walking pagetable at 000000017df90000, va_bits: 36. Using 3 levels [0x17df91000] | Table | | [0x17df92000] | Table | | [0x000001000 - 0x000200000] | Pages | Device-nGnRnE | Non-shareable [0x000200000 - 0x040000000] | Block | Device-nGnRnE | Non-shareable [0x040000000 - 0x080000000] | Block | Device-nGnRnE | Non-shareable [0x080000000 - 0x140000000] | Block | Normal | Inner-shareable [0x17df93000] | Table | | [0x140000000 - 0x17de00000] | Block | Normal | Inner-shareable [0x17df94000] | Table | | [0x17de00000 - 0x17dfa0000] | Pages | Normal | Inner-shareable
2024-06-25arm64: add software pagetable walkerCaleb Connolly1-0/+56
Add a basic software implementation of the ARM64 pagetable walker. This can be used for debugging U-Boot's pagetable, as well as dumping the pagetable from the previous bootloader stage if it used one (by reading out the ttbr address). One can either call dump_pagetable() to print the pagetable to the console with the default formatter, or implement their own pagetable handler using walke_pagetable() with a custom pte_walker_cb_t callback. All of the added code is discarded when unused, hence there is no need to add an additional Kconfig option for this. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-06-25arm64: mmu.h: fix PTE_TABLE_APCaleb Connolly1-1/+1
The APTable attribute is two bits wide according to the ARMv8-A architecture reference manual. Fix the macro accordingly. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-06-25usb: dwc3: meson-g12a: drop usb.h and make dwc3_meson_g12a_force_mode staticNeil Armstrong1-12/+0
Drop this useless usb.h and now make dwc3_meson_g12a_force_mode static since only used in the dwc3-meson-g12a.c file. Reviewed-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20240620-u-boot-usb-gxl-phy-set-mode-v2-5-b81c027bc02c@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-06-25usb: dwc3: meson-gxl: drop usb-gx.h and make dwc3_meson_gxl_force_mode staticNeil Armstrong1-14/+0
Drop this useless usb-gx.h and now make dwc3_meson_gxl_force_mode static since only used in the dwc3-meson-gxl.c file. Reviewed-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20240620-u-boot-usb-gxl-phy-set-mode-v2-4-b81c027bc02c@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-06-25phy: meson-gxl-usb2: remove phy_meson_gxl_usb2_set_modeNeil Armstrong1-3/+0
Remove the public phy_meson_gxl_usb2_set_mode and move the implementation in the the set_mode callback. Reviewed-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20240620-u-boot-usb-gxl-phy-set-mode-v2-3-b81c027bc02c@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-06-04Merge tag 'v2024.07-rc4' into nextTom Rini1-0/+4
Prepare v2024.070-rc4
2024-05-24clk: rockchip: rk3588: Set SPLL frequency during SPL stageHeiko Stuebner1-0/+4
All parts expect the SPLL to run at 702MHz. In U-Boot it's the SPLL_HZ declaring this rate and in the kernel it's a fixed clock definition. While everything is expecting 702MHz, the SPLL is not running that frequency when coming from the bootrom though, instead it's running at 351MHz and the vendor-u-boot just sets it to the expected frequency. The SPLL itself is located inside the secure-BUSCRU and in theory accessible as an SCMI clock, though this requires an unknown amount of cooperation from trusted-firmware to set at a later stage, though during the SPL stage we can still access the relevant CRU directly. The SPLL is for example necessary for the DSI controllers to produce output. As the SPLL is "just" another rk3588 pll, just set the desired rate directly during the SPL stage. Tested on rk3588-rock5b and rk3588-tiger by reading back the PLL rate and also observing working DSI output with this change. Fixes: 6737771600d4 ("rockchip: rk3588: Add support for sdmmc clocks in SPL") Suggested-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Cc: Jonas Karlman <jonas@kwiboo.se> Cc: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"WIP/20May2024-nextTom Rini25-1/+135
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-20Merge tag 'v2024.07-rc3' into nextTom Rini25-135/+1
Prepare v2024.07-rc3
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini25-135/+1
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-13armv8: generic_timer: Use event stream for udelayPeter Hoyes1-2/+4
Polling cntpct_el0 in a tight loop for delays is inefficient. This is particularly apparent on Arm FVPs, which do not simulate real time, meaning that a 1s sleep can take a couple of orders of magnitude longer to execute in wall time. If running at EL2 or above (where CNTHCTL_EL2 is available), enable the cntpct_el0 event stream temporarily and use wfe to implement the delay more efficiently. The event period is chosen as a trade-off between efficiency and the fact that Arm FVPs do not typically simulate real time. This is only implemented for Armv8 boards, where an architectural timer exists, and only enabled by default for the ARCH_VEXPRESS64 board family. Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2024-05-13arm: Move sev() and wfe() definitions to common Arm header filePeter Hoyes1-0/+9
The sev() and wfe() asm macros are currently defined only for mach-exynos. As these are common Arm instructions, move them to the common asm/system.h header file, for both Armv7 and Armv8, so they can be used by other machines. wfe may theoretically trigger a context switch if an interrupt occurs so add a memory barrier to this call. Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Reviewed-by: Andre Przywara<andre.przywara@arm.com>
2024-05-07Merge patch series "arm: Add Analog Devices SC5xx Machine Type"WIP/07May2024-nextTom Rini3-0/+100
Greg Malysa <greg.malysa@timesys.com> says: This series adds support for the ADI SC5xx machine type and includes two core drivers that are required for being able to boot any board--a UART driver, the gptimer driver which is used as a clock reference (CNTVCNT is not supported on the armv7 sc5xx SoCs) and the clock tree driver. Our corresponding Linux support relies on u-boot configuring the clocks correctly before booting, so it is not possible to boot any board without the CGU/CDU configuration happening here. There are also no board files, device trees, or defconfigs included here, but some common definitions that will be used to build board files currently are. The sc5xx SoCs themselves include many armv7 families (sc57x, sc58x, and sc594) all using an ARM Cortex-A5, and one armv8 family (sc598) indended to be a drop-in replacement for the SC594 in terms of peripherals, with a Cortex-A55 instead. Some of the configuration code in dmcinit and clkinit is quite scary and causes a lot of checkpatch violations. It is modified from code initially provided by ADI, but it has not been fully rewritten. There's a question of how important it is to clean up this code--it has some quality violations, but it has been in use (including in production) for over two years and is known to work for performing the low level SoC initialization, while a rewrite might introduce timing or sequence bugs that could take a significant amount of time to detect in the future.
2024-05-07arch: arm: Add Analog Devices SC5xx machine typeNathan Barrett-Morrison3-0/+100
Add support for the SC5xx machine type from Analog Devices. This includes support for the SC57x, SC58x, SC59x, and SC59x-64 SoCs, which have many common features such as common ADI IP blocks, and SHARC DSP cores. This commit introduces core functionality required for all boards using an SC5xx SoC, such as: - SPL configuration - Required CPU hooks such as reset - Boot ROM interaction to load the stage 2 bootloader in the reference configuration. Other options are possible but not officially supported at this time - SoC-common configuration expected to be reused by all boards - Early initialization for system clocks and DDR controller Co-developed-by: Greg Malysa <greg.malysa@timesys.com> Signed-off-by: Greg Malysa <greg.malysa@timesys.com> Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
2024-05-07arm: sunxi: Add missing <linux/types.h>Tom Rini2-0/+4
These files have many "Linux" style types in them, add <linux/types.h> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07arm: aspeed: Add missing <linux/types.h>Tom Rini2-0/+3
The scu* files have many "Linux" style types in them, add <linux/types.h> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07board: rockchip: Remove <common.h> and add needed includesTom Rini1-0/+2
Remove <common.h> from this board vendor directory and when needed add missing include files directly. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07board: nvidia: Remove <common.h> and add needed includesTom Rini2-0/+2
Remove <common.h> from this board vendor directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07board: freescale: Remove <common.h> and add needed includesTom Rini2-1/+3
Remove <common.h> from this board vendor directory and when needed add missing include files directly. Acked-by: Jason Liu <jason.hui.liu@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-06global: Make <asm/global_data.h> include <asm/u-boot.h>Tom Rini1-0/+1
This follows the example of RISC-V where <asm/global_data.h> includes <asm/u-boot.h> directly as "gd" includes a reference to bd_info already and so the first must include the second anyhow. We then remove <asm/u-boot.h> from all of the places which include references to "gd" an so have <asm/global_data.h> already. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-06arm: Remove <common.h> and add needed includesTom Rini1-0/+1
Remove <common.h> from the remainder of the files under arch/arm and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-06arm: fsl-layerscape: Remove <common.h> and add needed includesTom Rini3-0/+5
Remove <common.h> from all fsl-layerscape related files and when needed add missing include files directly. Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.1 at 2024-10-09 00:16:13 +0000