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-rw-r--r--include/configs/M5282EVB.h6
-rw-r--r--include/configs/MPC8548CDS.h5
-rw-r--r--include/configs/P2041RDB.h4
-rw-r--r--include/configs/T102xRDB.h4
-rw-r--r--include/configs/T104xRDB.h6
-rw-r--r--include/configs/T208xQDS.h5
-rw-r--r--include/configs/T208xRDB.h5
-rw-r--r--include/configs/T4240RDB.h5
-rw-r--r--include/configs/aristainetos2.h2
-rw-r--r--include/configs/eb_cpu5282.h30
-rw-r--r--include/configs/highbank.h5
-rw-r--r--include/configs/km/km-mpc8360.h1
-rw-r--r--include/configs/km/km-mpc83xx.h1
-rw-r--r--include/configs/ls1012a2g5rdb.h4
-rw-r--r--include/configs/ls1012a_common.h4
-rw-r--r--include/configs/ls1043aqds.h4
-rw-r--r--include/configs/ls1046a_common.h5
-rw-r--r--include/configs/p1_p2_rdb_pc.h6
-rw-r--r--include/configs/phycore_am335x_r2.h6
-rw-r--r--include/configs/r2dplus.h5
-rw-r--r--include/configs/socrates.h8
-rw-r--r--include/configs/ti814x_evm.h2
-rw-r--r--include/configs/ti_armv7_keystone2.h5
23 files changed, 2 insertions, 126 deletions
diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index e191dc6..925d26e 100644
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -130,13 +130,7 @@
#define CONFIG_SYS_PBDDR 0x0000000
#define CONFIG_SYS_PBDAT 0x0000000
-#define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */
-#define CONFIG_SYS_PCDDR 0x0000000
-#define CONFIG_SYS_PCDAT 0x0000000
-
#define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */
-#define CONFIG_SYS_PCDDR 0x0000000
-#define CONFIG_SYS_PCDAT 0x0000000
#define CONFIG_SYS_PEHLPAR 0xC0
#define CONFIG_SYS_PUAPAR 0x0F /* UA0..UA3 = Uart 0 +1 */
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index bde8fa8..c29e63c 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -256,21 +256,16 @@
*/
#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000
#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCI1_MEM_BUS 0xe0000000
#define CONFIG_SYS_PCI1_MEM_PHYS 0xc00000000ull
#else
-#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000
#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000
#endif
-#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */
#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000
-#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_SYS_PCI1_IO_PHYS 0xfe2000000ull
#else
#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000
#endif
-#define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */
#ifdef CONFIG_PCIE1
#define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 6b83b02..c832981 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -248,8 +248,6 @@
/* controller 3, Slot 1, tgtid 1, Base address 202000 */
#define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000
#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull
-#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000
-#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull
/* Qman/Bman */
#define CONFIG_SYS_BMAN_NUM_PORTALS 10
@@ -276,9 +274,7 @@
#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE
#endif
#define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000
-#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000
#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000
-#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE
#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \
CONFIG_SYS_QMAN_CENA_SIZE)
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index c4fed68..e21639a 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -349,8 +349,6 @@
#ifdef CONFIG_PCIE3
#define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000
#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull
-#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000
-#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull
#endif
#endif /* CONFIG_PCI */
@@ -391,9 +389,7 @@
#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE
#endif
#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000
-#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000
#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000
-#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE
#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \
CONFIG_SYS_QMAN_CENA_SIZE)
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 1eec945..a3d0488 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -325,16 +325,12 @@
#ifdef CONFIG_PCIE3
#define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000
#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull
-#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000
-#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull
#endif
/* controller 4, Base address 203000 */
#ifdef CONFIG_PCIE4
#define CONFIG_SYS_PCIE4_MEM_VIRT 0xb0000000
#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc30000000ull
-#define CONFIG_SYS_PCIE4_IO_VIRT 0xf8030000
-#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull
#endif
#endif /* CONFIG_PCI */
@@ -364,9 +360,7 @@
#define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000
#define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull
#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000
-#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000
#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000
-#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE
#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \
CONFIG_SYS_QMAN_CENA_SIZE)
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 42a0926..72052be 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -359,13 +359,10 @@
/* controller 3, Slot 1, tgtid 1, Base address 202000 */
#define CONFIG_SYS_PCIE3_MEM_VIRT 0xb0000000
#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc30000000ull
-#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000
-#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull
/* controller 4, Base address 203000 */
#define CONFIG_SYS_PCIE4_MEM_VIRT 0xc0000000
#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull
-#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull
/* Qman/Bman */
#ifndef CONFIG_NOBQFMAN
@@ -385,9 +382,7 @@
#define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000
#define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull
#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000
-#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000
#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000
-#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE
#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \
CONFIG_SYS_QMAN_CENA_SIZE)
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 941efdc..c798e44 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -313,13 +313,10 @@
/* controller 3, Slot 1, tgtid 1, Base address 202000 */
#define CONFIG_SYS_PCIE3_MEM_VIRT 0xb0000000
#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc30000000ull
-#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000
-#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull
/* controller 4, Base address 203000 */
#define CONFIG_SYS_PCIE4_MEM_VIRT 0xc0000000
#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull
-#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull
/* Qman/Bman */
#ifndef CONFIG_NOBQFMAN
@@ -339,9 +336,7 @@
#define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000
#define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull
#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000
-#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000
#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000
-#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE
#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \
CONFIG_SYS_QMAN_CENA_SIZE)
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 5969854..5777df8 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -121,13 +121,10 @@
/* controller 3, Slot 1, tgtid 1, Base address 202000 */
#define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000
#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull
-#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000
-#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull
/* controller 4, Base address 203000 */
#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000
#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull
-#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull
/*
* Miscellaneous configurable options
@@ -337,9 +334,7 @@
#define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000
#define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull
#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000
-#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000
#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000
-#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE
#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \
CONFIG_SYS_QMAN_CENA_SIZE)
diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h
index 1f2b3b5..35e8840 100644
--- a/include/configs/aristainetos2.h
+++ b/include/configs/aristainetos2.h
@@ -30,8 +30,6 @@
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
-
#ifdef CONFIG_IMX_HAB
#define HAB_EXTRA_SETTINGS \
"hab_check_addr=" \
diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index aaa2ef0..80a820c 100644
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -137,13 +137,7 @@
#define CONFIG_SYS_PBDDR 0x0000000
#define CONFIG_SYS_PBDAT 0x0000000
-#define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */
-#define CONFIG_SYS_PCDDR 0x0000000
-#define CONFIG_SYS_PCDAT 0x0000000
-
#define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */
-#define CONFIG_SYS_PCDDR 0x0000000
-#define CONFIG_SYS_PCDAT 0x0000000
#define CONFIG_SYS_PASPAR 0x0F0F
#define CONFIG_SYS_PEHLPAR 0xC0
@@ -160,29 +154,5 @@
#define CONFIG_I2C_RTC_ADDR 0x68
#endif
-/*-----------------------------------------------------------------------
- * VIDEO configuration
- */
-
-#define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 2
-#define CONFIG_SYS_VCXK_DOUBLEBUFFERED 1
-#define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS2_BASE
-
-#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT MCFGPTB_GPTPORT
-#define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR MCFGPTB_GPTDDR
-#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN 0x0001
-
-#define CONFIG_SYS_VCXK_ENABLE_PORT MCFGPTB_GPTPORT
-#define CONFIG_SYS_VCXK_ENABLE_DDR MCFGPTB_GPTDDR
-#define CONFIG_SYS_VCXK_ENABLE_PIN 0x0002
-
-#define CONFIG_SYS_VCXK_REQUEST_PORT MCFGPTB_GPTPORT
-#define CONFIG_SYS_VCXK_REQUEST_DDR MCFGPTB_GPTDDR
-#define CONFIG_SYS_VCXK_REQUEST_PIN 0x0004
-
-#define CONFIG_SYS_VCXK_INVERT_PORT MCFGPIO_PORTE
-#define CONFIG_SYS_VCXK_INVERT_DDR MCFGPIO_DDRE
-#define CONFIG_SYS_VCXK_INVERT_PIN MCFGPIO_PORT2
-
#endif /* _CONFIG_M5282EVB_H */
/*---------------------------------------------------------------------*/
diff --git a/include/configs/highbank.h b/include/configs/highbank.h
index 5e2b50b..a7d21a7 100644
--- a/include/configs/highbank.h
+++ b/include/configs/highbank.h
@@ -14,11 +14,6 @@
* Miscellaneous configurable options
*/
-/* Environment data setup
-*/
-#define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */
-#define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */
-
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/km/km-mpc8360.h b/include/configs/km/km-mpc8360.h
index 92e046d..fb43fb8 100644
--- a/include/configs/km/km-mpc8360.h
+++ b/include/configs/km/km-mpc8360.h
@@ -72,4 +72,3 @@
* PAXE on the local bus CS3
*/
#define CONFIG_SYS_PAXE_BASE 0xA0000000
-#define CONFIG_SYS_PAXE_SIZE 256
diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h
index ab0d0a7..7d36a25 100644
--- a/include/configs/km/km-mpc83xx.h
+++ b/include/configs/km/km-mpc83xx.h
@@ -8,7 +8,6 @@
* DDR Setup
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */
-#define CONFIG_SYS_SDRAM_BASE2 (CONFIG_SYS_SDRAM_BASE + 0x10000000) /* +256M */
#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h
index f0248e6..196e024 100644
--- a/include/configs/ls1012a2g5rdb.h
+++ b/include/configs/ls1012a2g5rdb.h
@@ -11,10 +11,6 @@
/* DDR */
#define CONFIG_SYS_SDRAM_SIZE 0x40000000
-/* SATA */
-
-#define CONFIG_SYS_SATA AHCI_BASE_ADDR
-
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"verify=no\0" \
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index b57eb52..809f9ae 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -18,10 +18,6 @@
/*SPI device */
#define CFG_SYS_FSL_QSPI_BASE 0x40000000
-/* SATA */
-
-#define CONFIG_SYS_SATA AHCI_BASE_ADDR
-
/* I2C */
/* GPIO */
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 3b51cb8..87751f7 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -35,10 +35,6 @@
#define QSGMII_CARD_PORT4_PHY_ADDR_S2 0xB
#endif
-/* SATA */
-
-#define CONFIG_SYS_SATA AHCI_BASE_ADDR
-
/*
* IFC Definitions
*/
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 8a3c87c..3934fbb 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -65,11 +65,6 @@
/* I2C */
-/* SATA */
-#ifndef SPL_NO_SATA
-#define CONFIG_SYS_SATA AHCI_BASE_ADDR
-#endif
-
/* FMan ucode */
#ifndef SPL_NO_FMAN
#define CONFIG_SYS_DPAA_FMAN
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 9fc22f0..44e6085 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -279,12 +279,6 @@
#define CONFIG_SYS_VSC7385_BASE_PHYS CONFIG_SYS_VSC7385_BASE
#endif
-#define CONFIG_SYS_VSC7385_BR_PRELIM \
- (BR_PHYS_ADDR(CONFIG_SYS_VSC7385_BASE_PHYS) | BR_PS_8 | BR_V)
-#define CONFIG_SYS_VSC7385_OR_PRELIM (OR_AM_128KB | OR_GPCM_CSNT | \
- OR_GPCM_XACS | OR_GPCM_SCY_15 | OR_GPCM_SETA | \
- OR_GPCM_TRLX | OR_GPCM_EHTR | OR_GPCM_EAD)
-
/* The size of the VSC7385 firmware image */
#define CONFIG_VSC7385_IMAGE_SIZE 8192
#endif
diff --git a/include/configs/phycore_am335x_r2.h b/include/configs/phycore_am335x_r2.h
index c5817b0..43a6082 100644
--- a/include/configs/phycore_am335x_r2.h
+++ b/include/configs/phycore_am335x_r2.h
@@ -97,10 +97,4 @@
#endif /* !CONFIG_MTD_RAW_NAND */
-/* CPU */
-
-#ifdef CONFIG_SPI_BOOT
-#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
-#endif
-
#endif /* ! __CONFIG_PHYCORE_AM335x_R2_H */
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index ac39e11..406ee62 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -18,9 +18,4 @@
#define CONFIG_SYS_FLASH_BASE (0xA0000000)
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
-/*
- * SuperH Clock setting
- */
-#define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */
-
#endif /* __CONFIG_H */
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 388a4e4..9b106fc 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -109,12 +109,8 @@
* Memory space is mapped 1-1.
*/
-#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000
-#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
-#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_PCI1_IO_BASE 0xE2000000
-#define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE
-#define CONFIG_SYS_PCI1_IO_SIZE 0x01000000 /* 16M */
+#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000
+#define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000
#define CONFIG_TSEC1 1
#define CONFIG_TSEC1_NAME "TSEC0"
diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index 9614fe6..fc78077 100644
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -84,8 +84,6 @@
/* Defines for SPL */
-#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
-
/*
* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
* 64 bytes before this address should be set aside for u-boot.img's
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 119b4c0..65abb18 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -46,11 +46,6 @@
/* SPI Configuration */
#define CONFIG_SYS_SPI_CLK ks_clk_get_rate(KS2_CLK1_6)
-/* Network Configuration */
-#define CONFIG_SYS_SGMII_REFCLK_MHZ 312
-#define CONFIG_SYS_SGMII_LINERATE_MHZ 1250
-#define CONFIG_SYS_SGMII_RATESCALE 2
-
/* Keystone net */
#define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR
#define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE
generated by cgit v1.1 at 2024-11-10 17:07:52 +0000