diff options
Diffstat (limited to 'include/net/pfe_eth/pfe/cbus')
| -rw-r--r-- | include/net/pfe_eth/pfe/cbus/class_csr.h | 1 | ||||
| -rw-r--r-- | include/net/pfe_eth/pfe/cbus/emac.h | 1 | ||||
| -rw-r--r-- | include/net/pfe_eth/pfe/cbus/hif.h | 1 | ||||
| -rw-r--r-- | include/net/pfe_eth/pfe/cbus/tmu_csr.h | 1 |
4 files changed, 4 insertions, 0 deletions
diff --git a/include/net/pfe_eth/pfe/cbus/class_csr.h b/include/net/pfe_eth/pfe/cbus/class_csr.h index e2fece7..80f1f96 100644 --- a/include/net/pfe_eth/pfe/cbus/class_csr.h +++ b/include/net/pfe_eth/pfe/cbus/class_csr.h @@ -12,6 +12,7 @@ * class_csr - block containing all the classifier control and status register. * Mapped on CBUS and accessible from all PE's and ARM. */ +#include <linux/bitops.h> #define CLASS_VERSION (CLASS_CSR_BASE_ADDR + 0x000) #define CLASS_TX_CTRL (CLASS_CSR_BASE_ADDR + 0x004) #define CLASS_INQ_PKTPTR (CLASS_CSR_BASE_ADDR + 0x010) diff --git a/include/net/pfe_eth/pfe/cbus/emac.h b/include/net/pfe_eth/pfe/cbus/emac.h index 53db8cc..5dc2113 100644 --- a/include/net/pfe_eth/pfe/cbus/emac.h +++ b/include/net/pfe_eth/pfe/cbus/emac.h @@ -7,6 +7,7 @@ #ifndef _EMAC_H_ #define _EMAC_H_ +#include <linux/bitops.h> #define EMAC_IEVENT_REG 0x004 #define EMAC_IMASK_REG 0x008 #define EMAC_R_DES_ACTIVE_REG 0x010 diff --git a/include/net/pfe_eth/pfe/cbus/hif.h b/include/net/pfe_eth/pfe/cbus/hif.h index 36722c5..aa4951e 100644 --- a/include/net/pfe_eth/pfe/cbus/hif.h +++ b/include/net/pfe_eth/pfe/cbus/hif.h @@ -12,6 +12,7 @@ * hif - PFE hif block control and status register. * Mapped on CBUS and accessible from all PE's and ARM. */ +#include <linux/bitops.h> #define HIF_VERSION (HIF_BASE_ADDR + 0x00) #define HIF_TX_CTRL (HIF_BASE_ADDR + 0x04) #define HIF_TX_CURR_BD_ADDR (HIF_BASE_ADDR + 0x08) diff --git a/include/net/pfe_eth/pfe/cbus/tmu_csr.h b/include/net/pfe_eth/pfe/cbus/tmu_csr.h index 1e1abe2..cfe8f8c 100644 --- a/include/net/pfe_eth/pfe/cbus/tmu_csr.h +++ b/include/net/pfe_eth/pfe/cbus/tmu_csr.h @@ -7,6 +7,7 @@ #ifndef _TMU_CSR_H_ #define _TMU_CSR_H_ +#include <linux/bitops.h> #define TMU_VERSION (TMU_CSR_BASE_ADDR + 0x000) #define TMU_INQ_WATERMARK (TMU_CSR_BASE_ADDR + 0x004) #define TMU_PHY_INQ_PKTPTR (TMU_CSR_BASE_ADDR + 0x008) |