diff options
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/sdhci.c | 9 | ||||
| -rw-r--r-- | drivers/mmc/zynq_sdhci.c | 47 |
2 files changed, 32 insertions, 24 deletions
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 400f87e..40e28ab 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -161,7 +161,8 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, /* We shouldn't wait for data inihibit for stop commands, even though they might use busy signaling */ if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION || - cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) + cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK || + cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) mask &= ~SDHCI_DATA_INHIBIT; while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { @@ -183,7 +184,8 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS); mask = SDHCI_INT_RESPONSE; - if (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) + if (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK || + cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) mask = SDHCI_INT_DATA_AVAIL; if (!(cmd->resp_type & MMC_RSP_PRESENT)) @@ -201,7 +203,8 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, flags |= SDHCI_CMD_CRC; if (cmd->resp_type & MMC_RSP_OPCODE) flags |= SDHCI_CMD_INDEX; - if (data || cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) + if (data || cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK || + cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) flags |= SDHCI_CMD_DATA; /* Set Transfer mode regarding to data flag */ diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index f99731f..5b6d525 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -32,12 +32,21 @@ struct arasan_sdhci_priv { }; #if defined(CONFIG_ARCH_ZYNQMP) +#define MMC_HS200_BUS_SPEED 5 + static const u8 mode2timing[] = { - [UHS_SDR12] = UHS_SDR12_BUS_SPEED, - [UHS_SDR25] = UHS_SDR25_BUS_SPEED, - [UHS_SDR50] = UHS_SDR50_BUS_SPEED, - [UHS_SDR104] = UHS_SDR104_BUS_SPEED, - [UHS_DDR50] = UHS_DDR50_BUS_SPEED, + [MMC_LEGACY] = UHS_SDR12_BUS_SPEED, + [SD_LEGACY] = UHS_SDR12_BUS_SPEED, + [MMC_HS] = HIGH_SPEED_BUS_SPEED, + [SD_HS] = HIGH_SPEED_BUS_SPEED, + [MMC_HS_52] = HIGH_SPEED_BUS_SPEED, + [MMC_DDR_52] = HIGH_SPEED_BUS_SPEED, + [UHS_SDR12] = UHS_SDR12_BUS_SPEED, + [UHS_SDR25] = UHS_SDR25_BUS_SPEED, + [UHS_SDR50] = UHS_SDR50_BUS_SPEED, + [UHS_DDR50] = UHS_DDR50_BUS_SPEED, + [UHS_SDR104] = UHS_SDR104_BUS_SPEED, + [MMC_HS_200] = MMC_HS200_BUS_SPEED, }; #define SDHCI_HOST_CTRL2 0x3E @@ -160,9 +169,6 @@ static void arasan_sdhci_set_tapdelay(struct sdhci_host *host) struct mmc *mmc = (struct mmc *)host->mmc; u8 uhsmode; - if (!IS_SD(mmc)) - return; - uhsmode = mode2timing[mmc->selected_mode]; if (uhsmode >= UHS_SDR25_BUS_SPEED) @@ -175,6 +181,9 @@ static void arasan_sdhci_set_control_reg(struct sdhci_host *host) struct mmc *mmc = (struct mmc *)host->mmc; u32 reg; + if (!IS_SD(mmc)) + return; + if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { reg = sdhci_readw(host, SDHCI_HOST_CTRL2); reg |= SDHCI_18V_SIGNAL; @@ -283,25 +292,21 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev) return -1; priv->host->name = dev->name; - priv->host->ioaddr = (void *)devfdt_get_addr(dev); - - priv->deviceid = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "xlnx,device_id", -1); - priv->bank = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "xlnx,mio_bank", -1); - if (fdt_get_property(gd->fdt_blob, dev_of_offset(dev), - "no-1-8-v", NULL)) - priv->no_1p8 = 1; - else - priv->no_1p8 = 0; #if defined(CONFIG_DM_MMC) && defined(CONFIG_ARCH_ZYNQMP) priv->host->ops = &arasan_ops; #endif - plat->f_max = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "max-frequency", CONFIG_ZYNQ_SDHCI_MAX_FREQ); + priv->host->ioaddr = (void *)dev_read_addr(dev); + if (IS_ERR(priv->host->ioaddr)) + return PTR_ERR(priv->host->ioaddr); + + priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1); + priv->bank = dev_read_u32_default(dev, "xlnx,mio_bank", -1); + priv->no_1p8 = dev_read_bool(dev, "no-1-8-v"); + plat->f_max = dev_read_u32_default(dev, "max-frequency", + CONFIG_ZYNQ_SDHCI_MAX_FREQ); return 0; } |