diff options
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/cpu/coreboot/Makefile | 2 | ||||
-rw-r--r-- | arch/x86/cpu/coreboot/coreboot.c | 87 | ||||
-rw-r--r-- | arch/x86/cpu/coreboot/pci.c | 30 |
3 files changed, 119 insertions, 0 deletions
diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile index 13f5f8a..fbf5a00 100644 --- a/arch/x86/cpu/coreboot/Makefile +++ b/arch/x86/cpu/coreboot/Makefile @@ -33,10 +33,12 @@ include $(TOPDIR)/config.mk LIB := $(obj)lib$(SOC).o +COBJS-$(CONFIG_SYS_COREBOOT) += coreboot.o COBJS-$(CONFIG_SYS_COREBOOT) += tables.o COBJS-$(CONFIG_SYS_COREBOOT) += ipchecksum.o COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o COBJS-$(CONFIG_SYS_COREBOOT) += sysinfo.o +COBJS-$(CONFIG_PCI) += pci.o SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c new file mode 100644 index 0000000..22a643c --- /dev/null +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2008 + * Graeme Russ, graeme.russ@gmail.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/u-boot-x86.h> +#include <flash.h> +#include <netdev.h> +#include <asm/arch-coreboot/tables.h> +#include <asm/arch-coreboot/sysinfo.h> + +DECLARE_GLOBAL_DATA_PTR; + +unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN; + +/* + * Miscellaneous platform dependent initializations + */ +int cpu_init_f(void) +{ + int ret = get_coreboot_info(&lib_sysinfo); + if (ret != 0) + printf("Failed to parse coreboot tables.\n"); + return ret; +} + +int board_early_init_f(void) +{ + return 0; +} + +int board_early_init_r(void) +{ + /* CPU Speed to 100MHz */ + gd->cpu_clk = 100000000; + + /* Crystal is 33.000MHz */ + gd->bus_clk = 33000000; + + return 0; +} + +void show_boot_progress(int val) +{ +} + + +int last_stage_init(void) +{ + return 0; +} + +#ifndef CONFIG_SYS_NO_FLASH +ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) +{ + return 0; +} +#endif + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} + +void setup_pcat_compatibility() +{ +} diff --git a/arch/x86/cpu/coreboot/pci.c b/arch/x86/cpu/coreboot/pci.c new file mode 100644 index 0000000..732ca3c --- /dev/null +++ b/arch/x86/cpu/coreboot/pci.c @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2008,2009 + * Graeme Russ, <graeme.russ@gmail.com> + * + * (C) Copyright 2002 + * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +void pci_init_board(void) +{ +} |