diff options
Diffstat (limited to 'arch/x86/dts')
-rw-r--r-- | arch/x86/dts/bayleybay.dts | 2 | ||||
-rw-r--r-- | arch/x86/dts/baytrail_som-db5800-som-6867.dts | 2 | ||||
-rw-r--r-- | arch/x86/dts/cherryhill.dts | 2 | ||||
-rw-r--r-- | arch/x86/dts/chromebook_link.dts | 2 | ||||
-rw-r--r-- | arch/x86/dts/chromebook_samus.dts | 2 | ||||
-rw-r--r-- | arch/x86/dts/chromebox_panther.dts | 2 | ||||
-rw-r--r-- | arch/x86/dts/conga-qeval20-qa3-e3845.dts | 2 | ||||
-rw-r--r-- | arch/x86/dts/cougarcanyon2.dts | 2 | ||||
-rw-r--r-- | arch/x86/dts/crownbay.dts | 2 | ||||
-rw-r--r-- | arch/x86/dts/dfi-bt700.dtsi | 2 | ||||
-rw-r--r-- | arch/x86/dts/edison.dts | 2 | ||||
-rw-r--r-- | arch/x86/dts/minnowmax.dts | 2 | ||||
-rw-r--r-- | arch/x86/dts/qemu-x86_i440fx.dts | 2 | ||||
-rw-r--r-- | arch/x86/dts/qemu-x86_q35.dts | 2 | ||||
-rw-r--r-- | arch/x86/dts/smbios.dtsi | 32 |
15 files changed, 60 insertions, 0 deletions
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts index d0168e8..70e5798 100644 --- a/arch/x86/dts/bayleybay.dts +++ b/arch/x86/dts/bayleybay.dts @@ -16,6 +16,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Intel Bayley Bay"; compatible = "intel,bayleybay", "intel,baytrail"; diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts index 5abbc66..a7dc03b 100644 --- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts +++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts @@ -16,6 +16,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Advantech SOM-DB5800-SOM-6867"; compatible = "advantech,som-db5800-som-6867", "intel,baytrail"; diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts index 37146fd..2ce7f1a 100644 --- a/arch/x86/dts/cherryhill.dts +++ b/arch/x86/dts/cherryhill.dts @@ -14,6 +14,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Intel Cherry Hill"; compatible = "intel,cherryhill", "intel,braswell"; diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index 09488f1..e529c4b 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -11,6 +11,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Google Link"; compatible = "google,link", "intel,celeron-ivybridge"; diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts index d8e04a6..adaeb1e 100644 --- a/arch/x86/dts/chromebook_samus.dts +++ b/arch/x86/dts/chromebook_samus.dts @@ -9,6 +9,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + #ifdef CONFIG_CHROMEOS_VBOOT #include "chromeos-x86.dtsi" #include "flashmap-x86-ro.dtsi" diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts index bcd4c4d..77b6ac9 100644 --- a/arch/x86/dts/chromebox_panther.dts +++ b/arch/x86/dts/chromebox_panther.dts @@ -6,6 +6,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Google Panther"; compatible = "google,panther", "intel,haswell"; diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts index 70b8c04..bbea99d 100644 --- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts +++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts @@ -16,6 +16,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "congatec-QEVAL20-QA3-E3845"; compatible = "congatec,qeval20-qa3-e3845", "intel,baytrail"; diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts index c6ba811..6025233 100644 --- a/arch/x86/dts/cougarcanyon2.dts +++ b/arch/x86/dts/cougarcanyon2.dts @@ -14,6 +14,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Intel Cougar Canyon 2"; compatible = "intel,cougarcanyon2", "intel,chiefriver"; diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index f492c35..a7166a9 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -15,6 +15,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Intel Crown Bay"; compatible = "intel,crownbay", "intel,queensbay"; diff --git a/arch/x86/dts/dfi-bt700.dtsi b/arch/x86/dts/dfi-bt700.dtsi index e9930cb..7d7b835 100644 --- a/arch/x86/dts/dfi-bt700.dtsi +++ b/arch/x86/dts/dfi-bt700.dtsi @@ -13,6 +13,8 @@ #include "rtc.dtsi" #include "tsc_timer.dtsi" +#include "smbios.dtsi" + / { config { silent_console = <0>; diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts index e2f9469..bc84bc8 100644 --- a/arch/x86/dts/edison.dts +++ b/arch/x86/dts/edison.dts @@ -12,6 +12,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Intel Edison"; compatible = "intel,edison"; diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index f4cdb2c..133d55b 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -15,6 +15,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Intel Minnowboard Max"; compatible = "intel,minnowmax", "intel,baytrail"; diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts index 2e5210d..c33a11d 100644 --- a/arch/x86/dts/qemu-x86_i440fx.dts +++ b/arch/x86/dts/qemu-x86_i440fx.dts @@ -14,6 +14,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "QEMU x86 (I440FX)"; compatible = "qemu,x86"; diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts index e8f55b1..9faae7f 100644 --- a/arch/x86/dts/qemu-x86_q35.dts +++ b/arch/x86/dts/qemu-x86_q35.dts @@ -24,6 +24,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "QEMU x86 (Q35)"; compatible = "qemu,x86"; diff --git a/arch/x86/dts/smbios.dtsi b/arch/x86/dts/smbios.dtsi new file mode 100644 index 0000000..9fa8c63 --- /dev/null +++ b/arch/x86/dts/smbios.dtsi @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Default SMBIOS information. Include this in your board .dts file if you want + * these defaults. + * + * Copyright 2020 Google LLC + */ + +#include <config.h> + +/ { + smbios: smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = CONFIG_SYS_VENDOR; + product = CONFIG_SYS_BOARD; + }; + + baseboard { + manufacturer = CONFIG_SYS_VENDOR; + product = CONFIG_SYS_BOARD; + }; + + chassis { + manufacturer = CONFIG_SYS_VENDOR; + /* chassis product is not set by default */ + }; + }; + }; +}; |