diff options
Diffstat (limited to 'arch/mips/dts')
| -rw-r--r-- | arch/mips/dts/luton_pcb090.dts | 51 | ||||
| -rw-r--r-- | arch/mips/dts/luton_pcb091.dts | 51 | ||||
| -rw-r--r-- | arch/mips/dts/mscc,luton.dtsi | 165 |
3 files changed, 267 insertions, 0 deletions
diff --git a/arch/mips/dts/luton_pcb090.dts b/arch/mips/dts/luton_pcb090.dts index 951d8da..315172b 100644 --- a/arch/mips/dts/luton_pcb090.dts +++ b/arch/mips/dts/luton_pcb090.dts @@ -55,3 +55,54 @@ }; }; +&mdio0 { + status = "okay"; +}; + +&port0 { + phy-handle = <&phy0>; +}; + +&port1 { + phy-handle = <&phy1>; +}; + +&port2 { + phy-handle = <&phy2>; +}; + +&port3 { + phy-handle = <&phy3>; +}; + +&port4 { + phy-handle = <&phy4>; +}; + +&port5 { + phy-handle = <&phy5>; +}; + +&port6 { + phy-handle = <&phy6>; +}; + +&port7 { + phy-handle = <&phy7>; +}; + +&port8 { + phy-handle = <&phy8>; +}; + +&port9 { + phy-handle = <&phy9>; +}; + +&port10 { + phy-handle = <&phy10>; +}; + +&port11 { + phy-handle = <&phy11>; +}; diff --git a/arch/mips/dts/luton_pcb091.dts b/arch/mips/dts/luton_pcb091.dts index bf638b2..9b4d628 100644 --- a/arch/mips/dts/luton_pcb091.dts +++ b/arch/mips/dts/luton_pcb091.dts @@ -61,3 +61,54 @@ }; }; +&mdio0 { + status = "okay"; +}; + +&port0 { + phy-handle = <&phy0>; +}; + +&port1 { + phy-handle = <&phy1>; +}; + +&port2 { + phy-handle = <&phy2>; +}; + +&port3 { + phy-handle = <&phy3>; +}; + +&port4 { + phy-handle = <&phy4>; +}; + +&port5 { + phy-handle = <&phy5>; +}; + +&port6 { + phy-handle = <&phy6>; +}; + +&port7 { + phy-handle = <&phy7>; +}; + +&port8 { + phy-handle = <&phy8>; +}; + +&port9 { + phy-handle = <&phy9>; +}; + +&port10 { + phy-handle = <&phy10>; +}; + +&port11 { + phy-handle = <&phy11>; +}; diff --git a/arch/mips/dts/mscc,luton.dtsi b/arch/mips/dts/mscc,luton.dtsi index d11ec48..de354fe 100644 --- a/arch/mips/dts/mscc,luton.dtsi +++ b/arch/mips/dts/mscc,luton.dtsi @@ -92,5 +92,170 @@ #address-cells = <1>; #size-cells = <0>; }; + + switch: switch@1010000 { + compatible = "mscc,vsc7527-switch"; + reg = <0x1e0000 0x0100>, // VTSS_TO_DEV_0 + <0x1f0000 0x0100>, // VTSS_TO_DEV_1 + <0x200000 0x0100>, // VTSS_TO_DEV_2 + <0x210000 0x0100>, // VTSS_TO_DEV_3 + <0x220000 0x0100>, // VTSS_TO_DEV_4 + <0x230000 0x0100>, // VTSS_TO_DEV_5 + <0x240000 0x0100>, // VTSS_TO_DEV_6 + <0x250000 0x0100>, // VTSS_TO_DEV_7 + <0x260000 0x0100>, // VTSS_TO_DEV_8 + <0x270000 0x0100>, // VTSS_TO_DEV_9 + <0x280000 0x0100>, // VTSS_TO_DEV_10 + <0x290000 0x0100>, // VTSS_TO_DEV_11 + <0x2a0000 0x0100>, // VTSS_TO_DEV_12 + <0x2b0000 0x0100>, // VTSS_TO_DEV_13 + <0x2c0000 0x0100>, // VTSS_TO_DEV_14 + <0x2d0000 0x0100>, // VTSS_TO_DEV_15 + <0x2e0000 0x0100>, // VTSS_TO_DEV_16 + <0x2f0000 0x0100>, // VTSS_TO_DEV_17 + <0x300000 0x0100>, // VTSS_TO_DEV_18 + <0x310000 0x0100>, // VTSS_TO_DEV_19 + <0x320000 0x0100>, // VTSS_TO_DEV_20 + <0x330000 0x0100>, // VTSS_TO_DEV_21 + <0x340000 0x0100>, // VTSS_TO_DEV_22 + <0x350000 0x0100>, // VTSS_TO_DEV_23 + <0x010000 0x1000>, // VTSS_TO_SYS + <0x020000 0x1000>, // VTSS_TO_ANA + <0x030000 0x1000>, // VTSS_TO_REW + <0x070000 0x1000>, // VTSS_TO_DEVCPU_GCB + <0x080000 0x0100>, // VTSS_TO_DEVCPU_QS + <0x0a0000 0x0100>; // VTSS_TO_HSIO + reg-names = "port0", "port1", "port2", "port3", + "port4", "port5", "port6", "port7", + "port8", "port9", "port10", "port11", + "port12", "port13", "port14", "port15", + "port16", "port17", "port18", "port19", + "port20", "port21", "port22", "port23", + "sys", "ana", "rew", "gcb", "qs", "hsio"; + status = "okay"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port0: port@0 { + reg = <0>; + }; + port1: port@1 { + reg = <1>; + }; + port2: port@2 { + reg = <2>; + }; + port3: port@3 { + reg = <3>; + }; + port4: port@4 { + reg = <4>; + }; + port5: port@5 { + reg = <5>; + }; + port6: port@6 { + reg = <6>; + }; + port7: port@7 { + reg = <7>; + }; + port8: port@8 { + reg = <8>; + }; + port9: port@9 { + reg = <9>; + }; + port10: port@10 { + reg = <10>; + }; + port11: port@11 { + reg = <11>; + }; + port12: port@12 { + reg = <12>; + }; + port13: port@13 { + reg = <13>; + }; + port14: port@14 { + reg = <14>; + }; + port15: port@15 { + reg = <15>; + }; + port16: port@16 { + reg = <16>; + }; + port17: port@17 { + reg = <17>; + }; + port18: port@18 { + reg = <18>; + }; + port19: port@19 { + reg = <19>; + }; + port20: port@20 { + reg = <20>; + }; + port21: port@21 { + reg = <21>; + }; + port22: port@22 { + reg = <22>; + }; + port23: port@23 { + reg = <23>; + }; + }; + }; + + mdio0: mdio@700a0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mscc,luton-miim"; + reg = <0x700a0 0x24>; + status = "disabled"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; + phy1: ethernet-phy@1 { + reg = <1>; + }; + phy2: ethernet-phy@2 { + reg = <2>; + }; + phy3: ethernet-phy@3 { + reg = <3>; + }; + phy4: ethernet-phy@4 { + reg = <4>; + }; + phy5: ethernet-phy@5 { + reg = <5>; + }; + phy6: ethernet-phy@6 { + reg = <6>; + }; + phy7: ethernet-phy@7 { + reg = <7>; + }; + phy8: ethernet-phy@8 { + reg = <8>; + }; + phy9: ethernet-phy@9 { + reg = <9>; + }; + phy10: ethernet-phy@10 { + reg = <10>; + }; + phy11: ethernet-phy@11 { + reg = <11>; + }; + }; }; }; |