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Diffstat (limited to 'arch/m68k/lib')
-rw-r--r--arch/m68k/lib/cache.c28
-rw-r--r--arch/m68k/lib/interrupts.c2
-rw-r--r--arch/m68k/lib/time.c24
3 files changed, 27 insertions, 27 deletions
diff --git a/arch/m68k/lib/cache.c b/arch/m68k/lib/cache.c
index 4ddda69..57e5632 100644
--- a/arch/m68k/lib/cache.c
+++ b/arch/m68k/lib/cache.c
@@ -33,12 +33,12 @@ void icache_enable(void)
*cf_icache_status = 1;
-#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
+#if defined(CONFIG_CF_V4) || defined(CFG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr2"::"r"(CFG_SYS_CACHE_ACR2));
- __asm__ __volatile__("movec %0, %%acr3"::"r"(CONFIG_SYS_CACHE_ACR3));
-#if defined(CONFIG_CF_V4E)
- __asm__ __volatile__("movec %0, %%acr6"::"r"(CONFIG_SYS_CACHE_ACR6));
- __asm__ __volatile__("movec %0, %%acr7"::"r"(CONFIG_SYS_CACHE_ACR7));
+ __asm__ __volatile__("movec %0, %%acr3"::"r"(CFG_SYS_CACHE_ACR3));
+#if defined(CFG_CF_V4E)
+ __asm__ __volatile__("movec %0, %%acr6"::"r"(CFG_SYS_CACHE_ACR6));
+ __asm__ __volatile__("movec %0, %%acr7"::"r"(CFG_SYS_CACHE_ACR7));
#endif
#else
__asm__ __volatile__("movec %0, %%acr0"::"r"(CFG_SYS_CACHE_ACR0));
@@ -55,10 +55,10 @@ void icache_disable(void)
*cf_icache_status = 0;
icache_invalid();
-#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
+#if defined(CONFIG_CF_V4) || defined(CFG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr2"::"r"(temp));
__asm__ __volatile__("movec %0, %%acr3"::"r"(temp));
-#if defined(CONFIG_CF_V4E)
+#if defined(CFG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr6"::"r"(temp));
__asm__ __volatile__("movec %0, %%acr7"::"r"(temp));
#endif
@@ -88,12 +88,12 @@ void dcache_enable(void)
dcache_invalid();
*cf_dcache_status = 1;
-#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
+#if defined(CONFIG_CF_V4) || defined(CFG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr0"::"r"(CFG_SYS_CACHE_ACR0));
__asm__ __volatile__("movec %0, %%acr1"::"r"(CFG_SYS_CACHE_ACR1));
-#if defined(CONFIG_CF_V4E)
- __asm__ __volatile__("movec %0, %%acr4"::"r"(CONFIG_SYS_CACHE_ACR4));
- __asm__ __volatile__("movec %0, %%acr5"::"r"(CONFIG_SYS_CACHE_ACR5));
+#if defined(CFG_CF_V4E)
+ __asm__ __volatile__("movec %0, %%acr4"::"r"(CFG_SYS_CACHE_ACR4));
+ __asm__ __volatile__("movec %0, %%acr5"::"r"(CFG_SYS_CACHE_ACR5));
#endif
#endif
@@ -109,10 +109,10 @@ void dcache_disable(void)
__asm__ __volatile__("movec %0, %%cacr"::"r"(temp));
-#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
+#if defined(CONFIG_CF_V4) || defined(CFG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr0"::"r"(temp));
__asm__ __volatile__("movec %0, %%acr1"::"r"(temp));
-#if defined(CONFIG_CF_V4E)
+#if defined(CFG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr4"::"r"(temp));
__asm__ __volatile__("movec %0, %%acr5"::"r"(temp));
#endif
@@ -121,7 +121,7 @@ void dcache_disable(void)
void dcache_invalid(void)
{
-#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
+#if defined(CONFIG_CF_V4) || defined(CFG_CF_V4E)
u32 temp;
temp = CFG_SYS_DCACHE_INV;
diff --git a/arch/m68k/lib/interrupts.c b/arch/m68k/lib/interrupts.c
index 1caef61..799daab 100644
--- a/arch/m68k/lib/interrupts.c
+++ b/arch/m68k/lib/interrupts.c
@@ -14,7 +14,7 @@
#include <asm/immap.h>
#include <asm/ptrace.h>
-#define NR_IRQS (CONFIG_SYS_NUM_IRQS)
+#define NR_IRQS (CFG_SYS_NUM_IRQS)
/*
* Interrupt vector functions.
diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c
index cd7437b..2ce6908 100644
--- a/arch/m68k/lib/time.c
+++ b/arch/m68k/lib/time.c
@@ -21,23 +21,23 @@ DECLARE_GLOBAL_DATA_PTR;
static volatile ulong timestamp = 0;
-#ifndef CONFIG_SYS_WATCHDOG_FREQ
-#define CONFIG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2)
+#ifndef CFG_SYS_WATCHDOG_FREQ
+#define CFG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2)
#endif
#if defined(CONFIG_MCFTMR)
-#ifndef CONFIG_SYS_UDELAY_BASE
+#ifndef CFG_SYS_UDELAY_BASE
# error "uDelay base not defined!"
#endif
-#if !defined(CONFIG_SYS_TMR_BASE) || !defined(CONFIG_SYS_INTR_BASE) || !defined(CONFIG_SYS_TMRINTR_NO) || !defined(CONFIG_SYS_TMRINTR_MASK)
+#if !defined(CFG_SYS_TMR_BASE) || !defined(CFG_SYS_INTR_BASE) || !defined(CFG_SYS_TMRINTR_NO) || !defined(CFG_SYS_TMRINTR_MASK)
# error "TMR_BASE, INTR_BASE, TMRINTR_NO or TMRINTR_MASk not defined!"
#endif
extern void dtimer_intr_setup(void);
void __udelay(unsigned long usec)
{
- volatile dtmr_t *timerp = (dtmr_t *) (CONFIG_SYS_UDELAY_BASE);
+ volatile dtmr_t *timerp = (dtmr_t *) (CFG_SYS_UDELAY_BASE);
uint start, now, tmp;
while (usec > 0) {
@@ -52,7 +52,7 @@ void __udelay(unsigned long usec)
timerp->tcn = 0;
/* set period to 1 us */
timerp->tmr =
- CONFIG_SYS_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 | DTIM_DTMR_FRR |
+ CFG_SYS_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 | DTIM_DTMR_FRR |
DTIM_DTMR_RST_EN;
start = now = timerp->tcn;
@@ -63,15 +63,15 @@ void __udelay(unsigned long usec)
void dtimer_interrupt(void *not_used)
{
- volatile dtmr_t *timerp = (dtmr_t *) (CONFIG_SYS_TMR_BASE);
+ volatile dtmr_t *timerp = (dtmr_t *) (CFG_SYS_TMR_BASE);
/* check for timer interrupt asserted */
- if ((CONFIG_SYS_TMRPND_REG & CONFIG_SYS_TMRINTR_MASK) == CONFIG_SYS_TMRINTR_PEND) {
+ if ((CFG_SYS_TMRPND_REG & CFG_SYS_TMRINTR_MASK) == CFG_SYS_TMRINTR_PEND) {
timerp->ter = (DTIM_DTER_CAP | DTIM_DTER_REF);
timestamp++;
#if defined(CONFIG_WATCHDOG) || defined (CONFIG_HW_WATCHDOG)
- if (CONFIG_SYS_WATCHDOG_FREQ && (timestamp % (CONFIG_SYS_WATCHDOG_FREQ)) == 0) {
+ if (CFG_SYS_WATCHDOG_FREQ && (timestamp % (CFG_SYS_WATCHDOG_FREQ)) == 0) {
schedule();
}
#endif /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */
@@ -81,7 +81,7 @@ void dtimer_interrupt(void *not_used)
int timer_init(void)
{
- volatile dtmr_t *timerp = (dtmr_t *) (CONFIG_SYS_TMR_BASE);
+ volatile dtmr_t *timerp = (dtmr_t *) (CFG_SYS_TMR_BASE);
timestamp = 0;
@@ -92,7 +92,7 @@ int timer_init(void)
timerp->tmr = DTIM_DTMR_RST_RST;
/* initialize and enable timer interrupt */
- irq_install_handler(CONFIG_SYS_TMRINTR_NO, dtimer_interrupt, 0);
+ irq_install_handler(CFG_SYS_TMRINTR_NO, dtimer_interrupt, 0);
timerp->tcn = 0;
timerp->trr = 1000; /* Interrupt every ms */
@@ -100,7 +100,7 @@ int timer_init(void)
dtimer_intr_setup();
/* set a period of 1us, set timer mode to restart and enable timer and interrupt */
- timerp->tmr = CONFIG_SYS_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 |
+ timerp->tmr = CFG_SYS_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 |
DTIM_DTMR_FRR | DTIM_DTMR_ORRI | DTIM_DTMR_RST_EN;
return 0;