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-rw-r--r--arch/arm/cpu/armv7/s5p-common/timer.c2
-rw-r--r--arch/arm/include/asm/arch-aspeed/scu_ast2500.h4
-rw-r--r--arch/arm/include/asm/arch-aspeed/wdt.h4
-rw-r--r--arch/arm/include/asm/arch-hi6220/pinmux.h2
-rw-r--r--arch/arm/include/asm/arch-rockchip/clock.h8
-rw-r--r--arch/arm/include/asm/arch-tegra/ap.h6
-rw-r--r--arch/arm/include/asm/arch-tegra/clock.h30
-rw-r--r--arch/arm/include/asm/arch-tegra/funcmux.h2
-rw-r--r--arch/arm/include/asm/arch-tegra/ivc.h12
-rw-r--r--arch/arm/include/asm/arch-tegra/sys_proto.h6
-rw-r--r--arch/arm/include/asm/arch-tegra/tegra_i2c.h2
-rw-r--r--arch/arm/include/asm/arch-tegra/warmboot.h2
-rw-r--r--arch/arm/include/asm/arch-tegra124/display.h4
-rw-r--r--arch/arm/include/asm/arch-tegra20/emc.h4
-rw-r--r--arch/arm/include/asm/omap_gpio.h2
-rw-r--r--arch/arm/mach-bcm283x/include/mach/msg.h10
-rw-r--r--arch/arm/mach-exynos/clock.c2
-rw-r--r--arch/arm/mach-exynos/clock_init.h2
-rw-r--r--arch/arm/mach-exynos/common_setup.h2
-rw-r--r--arch/arm/mach-exynos/dmc_init_ddr3.c4
-rw-r--r--arch/arm/mach-exynos/exynos5_setup.h4
-rw-r--r--arch/arm/mach-exynos/include/mach/clk.h2
-rw-r--r--arch/arm/mach-exynos/include/mach/pinmux.h4
-rw-r--r--arch/arm/mach-exynos/include/mach/spl.h2
-rw-r--r--arch/arm/mach-imx/ddrmc-vf610-calibration.h2
-rw-r--r--arch/arm/mach-s5pc1xx/include/mach/pinmux.h4
-rw-r--r--arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c4
-rw-r--r--arch/arm/mach-tegra/clock.c10
-rw-r--r--arch/arm/mach-tegra/tegra114/clock.c4
-rw-r--r--arch/arm/mach-tegra/tegra124/clock.c6
-rw-r--r--arch/arm/mach-tegra/tegra20/clock.c4
-rw-r--r--arch/arm/mach-tegra/tegra20/emc.c4
-rw-r--r--arch/arm/mach-tegra/tegra210/clock.c4
-rw-r--r--arch/arm/mach-tegra/tegra30/clock.c4
34 files changed, 84 insertions, 84 deletions
diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c
index 8141f40..8533d04 100644
--- a/arch/arm/cpu/armv7/s5p-common/timer.c
+++ b/arch/arm/cpu/armv7/s5p-common/timer.c
@@ -37,7 +37,7 @@ static inline struct s5p_timer *s5p_get_base_timer(void)
* This operates at 1MHz and counts downwards. It will wrap about every
* hour (2^32 microseconds).
*
- * @return current value of timer
+ * Return: current value of timer
*/
static unsigned long timer_get_us_down(void)
{
diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
index 8db4901..50d6a6b 100644
--- a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
+++ b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
@@ -217,14 +217,14 @@ struct ast2500_scu {
* ast_get_clk() - get a pointer to Clock Driver
*
* @devp, OUT - pointer to Clock Driver
- * @return zero on success, error code (< 0) otherwise.
+ * Return: zero on success, error code (< 0) otherwise.
*/
int ast_get_clk(struct udevice **devp);
/**
* ast_get_scu() - get a pointer to SCU registers
*
- * @return pointer to struct ast2500_scu on success, ERR_PTR otherwise
+ * Return: pointer to struct ast2500_scu on success, ERR_PTR otherwise
*/
void *ast_get_scu(void);
diff --git a/arch/arm/include/asm/arch-aspeed/wdt.h b/arch/arm/include/asm/arch-aspeed/wdt.h
index fb04d41..6fac7ff 100644
--- a/arch/arm/include/asm/arch-aspeed/wdt.h
+++ b/arch/arm/include/asm/arch-aspeed/wdt.h
@@ -84,7 +84,7 @@ struct ast_wdt {
* gets Reset Mode value from it.
*
* @flags: flags parameter passed into wdt_reset or wdt_start
- * @return Reset Mode value
+ * Return: Reset Mode value
*/
u32 ast_reset_mode_from_flags(ulong flags);
@@ -93,7 +93,7 @@ u32 ast_reset_mode_from_flags(ulong flags);
* gets Reset Mask value from it. Reset Mask is only supported on ast2500
*
* @flags: flags parameter passed into wdt_reset or wdt_start
- * @return Reset Mask value
+ * Return: Reset Mask value
*/
u32 ast_reset_mask_from_flags(ulong flags);
diff --git a/arch/arm/include/asm/arch-hi6220/pinmux.h b/arch/arm/include/asm/arch-hi6220/pinmux.h
index b4a9957..d18d214 100644
--- a/arch/arm/include/asm/arch-hi6220/pinmux.h
+++ b/arch/arm/include/asm/arch-hi6220/pinmux.h
@@ -74,7 +74,7 @@ struct hi6220_pinmux1_regs {
* pull-up/down and drive strength.
*
* @param peripheral peripheral to be configured
- * @return 0 if ok, -1 on error (e.g. unsupported peripheral)
+ * Return: 0 if ok, -1 on error (e.g. unsupported peripheral)
*/
int hi6220_pinmux_config(int peripheral);
diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 5108180..566bdcc 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -129,7 +129,7 @@ struct sysreset_reg {
*
* @input_rate: Input clock rate in Hz
* @output_rate: Output clock rate in Hz
- * @return divisor register value to use
+ * Return: divisor register value to use
*/
static inline u32 clk_get_divisor(ulong input_rate, uint output_rate)
{
@@ -144,14 +144,14 @@ static inline u32 clk_get_divisor(ulong input_rate, uint output_rate)
/**
* rockchip_get_cru() - get a pointer to the clock/reset unit registers
*
- * @return pointer to registers, or -ve error on error
+ * Return: pointer to registers, or -ve error on error
*/
void *rockchip_get_cru(void);
/**
* rockchip_get_pmucru() - get a pointer to the clock/reset unit registers
*
- * @return pointer to registers, or -ve error on error
+ * Return: pointer to registers, or -ve error on error
*/
void *rockchip_get_pmucru(void);
@@ -168,7 +168,7 @@ int rockchip_get_clk(struct udevice **devp);
* @pdev: clock udevice
* @reg_offset: the first offset in cru for softreset registers
* @reg_number: the reg numbers of softreset registers
- * @return 0 success, or error value
+ * Return: 0 success, or error value
*/
int rockchip_reset_bind(struct udevice *pdev, u32 reg_offset, u32 reg_number);
diff --git a/arch/arm/include/asm/arch-tegra/ap.h b/arch/arm/include/asm/arch-tegra/ap.h
index de21dff..78aeb25 100644
--- a/arch/arm/include/asm/arch-tegra/ap.h
+++ b/arch/arm/include/asm/arch-tegra/ap.h
@@ -42,21 +42,21 @@ extern void _start(void);
/**
* Works out the SOC/SKU type used for clocks settings
*
- * @return SOC type - see TEGRA_SOC...
+ * Return: SOC type - see TEGRA_SOC...
*/
int tegra_get_chip_sku(void);
/**
* Returns the pure SOC (chip ID) from the HIDREV register
*
- * @return SOC ID - see CHIPID_TEGRAxx...
+ * Return: SOC ID - see CHIPID_TEGRAxx...
*/
int tegra_get_chip(void);
/**
* Returns the SKU ID from the sku_info register
*
- * @return SKU ID - see SKU_ID_Txx...
+ * Return: SKU ID - see SKU_ID_Txx...
*/
int tegra_get_sku_info(void);
diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h
index 1d80d9e..6586015 100644
--- a/arch/arm/include/asm/arch-tegra/clock.h
+++ b/arch/arm/include/asm/arch-tegra/clock.h
@@ -70,7 +70,7 @@ unsigned long clock_start_pll(enum clock_id id, u32 divm, u32 divn,
* @param pllout pll output id
* @param rate desired output rate
*
- * @return 0 if ok, -1 on error (invalid clock id or no suitable divider)
+ * Return: 0 if ok, -1 on error (invalid clock id or no suitable divider)
*/
int clock_set_pllout(enum clock_id clkid, enum pll_out_id pllout,
unsigned rate);
@@ -193,7 +193,7 @@ void clock_ll_set_source_divisor(enum periph_id periph_id, unsigned source,
* specific knowledge of system-level clock tree structure.
*
* @param periph_id peripheral to query
- * @return clock ID of the peripheral's current parent clock
+ * Return: clock ID of the peripheral's current parent clock
*/
enum clock_id clock_get_periph_parent(enum periph_id periph_id);
@@ -204,7 +204,7 @@ enum clock_id clock_get_periph_parent(enum periph_id periph_id);
* @param periph_id peripheral to start
* @param parent PLL id of required parent clock
* @param rate Required clock rate in Hz
- * @return rate selected in Hz, or -1U if something went wrong
+ * Return: rate selected in Hz, or -1U if something went wrong
*/
unsigned clock_start_periph_pll(enum periph_id periph_id,
enum clock_id parent, unsigned rate);
@@ -217,7 +217,7 @@ unsigned clock_start_periph_pll(enum periph_id periph_id,
* @param periph_id peripheral to start
* @param parent PLL id of parent clock (used to calculate rate, you
* must know this!)
- * @return clock rate of peripheral in Hz
+ * Return: clock rate of peripheral in Hz
*/
unsigned long clock_get_periph_rate(enum periph_id periph_id,
enum clock_id parent);
@@ -233,7 +233,7 @@ unsigned long clock_get_periph_rate(enum periph_id periph_id,
* @param rate Required clock rate in Hz
* @param extra_div value for the second-stage divisor (NULL if one is
not available)
- * @return rate selected in Hz, or -1U if something went wrong
+ * Return: rate selected in Hz, or -1U if something went wrong
*/
unsigned clock_adjust_periph_pll_div(enum periph_id periph_id,
enum clock_id parent, unsigned rate, int *extra_div);
@@ -242,7 +242,7 @@ unsigned clock_adjust_periph_pll_div(enum periph_id periph_id,
* Returns the clock rate of a specified clock, in Hz.
*
* @param parent PLL id of clock to check
- * @return rate of clock in Hz
+ * Return: rate of clock in Hz
*/
unsigned clock_get_rate(enum clock_id clkid);
@@ -265,21 +265,21 @@ void clock_ll_start_uart(enum periph_id periph_id);
*
* @param blob FDT blob to use
* @param node Node to look at
- * @return peripheral ID, or PERIPH_ID_NONE if none
+ * Return: peripheral ID, or PERIPH_ID_NONE if none
*/
int clock_decode_periph_id(struct udevice *dev);
/**
* Checks if the oscillator bypass is enabled (XOBP bit)
*
- * @return 1 if bypass is enabled, 0 if not
+ * Return: 1 if bypass is enabled, 0 if not
*/
int clock_get_osc_bypass(void);
/*
* Checks that clocks are valid and prints a warning if not
*
- * @return 0 if ok, -1 on error
+ * Return: 0 if ok, -1 on error
*/
int clock_verify(void);
@@ -310,7 +310,7 @@ struct clk_pll_simple *clock_get_simple_pll(enum clock_id clkid);
* @param mux_bits Set to number of bits in mux register
* @param divider_bits Set to the relevant MASK_BITS_* value
* @param type Set to the SoC-specific clock type
- * @return 0 on success, -1 on error
+ * Return: 0 on success, -1 on error
*/
int get_periph_clock_info(enum periph_id periph_id, int *mux_bits,
int *divider_bits, int *type);
@@ -324,7 +324,7 @@ int get_periph_clock_info(enum periph_id periph_id, int *mux_bits,
*
* @param periph_id peripheral to query
* @param source raw clock source mux value
- * @return the CLOCK_ID_* value @source represents
+ * Return: the CLOCK_ID_* value @source represents
*/
enum clock_id get_periph_clock_id(enum periph_id periph_id, int source);
@@ -338,7 +338,7 @@ enum clock_id get_periph_clock_id(enum periph_id periph_id, int source);
* @param source PLL id of required parent clock
* @param mux_bits Set to number of bits in mux register: 2 or 4
* @param divider_bits Set to number of divider bits (8 or 16)
- * @return mux value (0-4, or -1 if not found)
+ * Return: mux value (0-4, or -1 if not found)
*/
int get_periph_clock_source(enum periph_id periph_id,
enum clock_id parent, int *mux_bits, int *divider_bits);
@@ -349,7 +349,7 @@ int get_periph_clock_source(enum periph_id periph_id,
* provided.
*
* @param clk_id Clock ID according to tegra30 device tree binding
- * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
+ * Return: peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
*/
enum periph_id clk_id_to_periph_id(int clk_id);
@@ -367,7 +367,7 @@ enum periph_id clk_id_to_periph_id(int clk_id);
* @param m PLL input divider(DIVN)
* @param p post divider(DIVP)
* @param cpcon base PLL charge pump(CPCON)
- * @return 0 if ok, -1 on error (the requested PLL is incorrect and cannot
+ * Return: 0 if ok, -1 on error (the requested PLL is incorrect and cannot
* be overridden), 1 if PLL is already correct
*/
int clock_set_rate(enum clock_id clkid, u32 n, u32 m, u32 p, u32 cpcon);
@@ -416,7 +416,7 @@ extern struct periph_clk_init periph_clk_init_table[];
* Enable output clock for external peripherals
*
* @param clk_id Clock ID to output (1, 2 or 3)
- * @return 0 if OK. -ve on error
+ * Return: 0 if OK. -ve on error
*/
int clock_external_output(int clk_id);
diff --git a/arch/arm/include/asm/arch-tegra/funcmux.h b/arch/arm/include/asm/arch-tegra/funcmux.h
index cf3ce3b..ebef6ea 100644
--- a/arch/arm/include/asm/arch-tegra/funcmux.h
+++ b/arch/arm/include/asm/arch-tegra/funcmux.h
@@ -21,7 +21,7 @@
*
* @param id Peripheral id
* @param config Configuration to use (FUNCMUX_...), 0 for default
- * @return 0 if ok, -1 on error (e.g. incorrect id or config)
+ * Return: 0 if ok, -1 on error (e.g. incorrect id or config)
*/
int funcmux_select(enum periph_id id, int config);
diff --git a/arch/arm/include/asm/arch-tegra/ivc.h b/arch/arm/include/asm/arch-tegra/ivc.h
index 52c10b8..fef8b16 100644
--- a/arch/arm/include/asm/arch-tegra/ivc.h
+++ b/arch/arm/include/asm/arch-tegra/ivc.h
@@ -88,7 +88,7 @@ struct tegra_ivc {
* @ivc The IVC channel.
* @frame Pointer to be filled with the address of the frame to receive.
*
- * @return 0 if a frame is available, else a negative error code.
+ * Return: 0 if a frame is available, else a negative error code.
*/
int tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc, void **frame);
@@ -102,7 +102,7 @@ int tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc, void **frame);
*
* @ivc The IVC channel.
*
- * @return 0 if OK, else a negative error code.
+ * Return: 0 if OK, else a negative error code.
*/
int tegra_ivc_read_advance(struct tegra_ivc *ivc);
@@ -116,7 +116,7 @@ int tegra_ivc_read_advance(struct tegra_ivc *ivc);
* @ivc The IVC channel.
* @frame Pointer to be filled with the address of the frame to fill.
*
- * @return 0 if a frame is available, else a negative error code.
+ * Return: 0 if a frame is available, else a negative error code.
*/
int tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc, void **frame);
@@ -130,7 +130,7 @@ int tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc, void **frame);
*
* @ivc The IVC channel.
*
- * @return 0 if OK, else a negative error code.
+ * Return: 0 if OK, else a negative error code.
*/
int tegra_ivc_write_advance(struct tegra_ivc *ivc);
@@ -141,7 +141,7 @@ int tegra_ivc_write_advance(struct tegra_ivc *ivc);
*
* @ivc The IVC channel.
*
- * @return 0 if the channel is ready for communication, or -EAGAIN if a
+ * Return: 0 if the channel is ready for communication, or -EAGAIN if a
* channel reset is in progress.
*/
int tegra_ivc_channel_notified(struct tegra_ivc *ivc);
@@ -167,7 +167,7 @@ void tegra_ivc_channel_reset(struct tegra_ivc *ivc);
* @nframes Number of frames in each shared memory buffer.
* @frame_size Size of each frame.
*
- * @return 0 if OK, else a negative error code.
+ * Return: 0 if OK, else a negative error code.
*/
int tegra_ivc_init(struct tegra_ivc *ivc, ulong rx_base, ulong tx_base,
uint32_t nframes, uint32_t frame_size,
diff --git a/arch/arm/include/asm/arch-tegra/sys_proto.h b/arch/arm/include/asm/arch-tegra/sys_proto.h
index 62e1c7b..c3a2673 100644
--- a/arch/arm/include/asm/arch-tegra/sys_proto.h
+++ b/arch/arm/include/asm/arch-tegra/sys_proto.h
@@ -12,7 +12,7 @@ void invalidate_dcache(void);
/**
* tegra_board_id() - Get the board iD
*
- * @return a board ID, or -ve on error
+ * Return: a board ID, or -ve on error
*/
int tegra_board_id(void);
@@ -20,14 +20,14 @@ int tegra_board_id(void);
* tegra_lcd_pmic_init() - Set up the PMIC for a board
*
* @board_id: Board ID which may be used to select LCD type
- * @return 0 if OK, -ve on error
+ * Return: 0 if OK, -ve on error
*/
int tegra_lcd_pmic_init(int board_id);
/**
* nvidia_board_init() - perform any board-specific init
*
- * @return 0 if OK, -ve on error
+ * Return: 0 if OK, -ve on error
*/
int nvidia_board_init(void);
diff --git a/arch/arm/include/asm/arch-tegra/tegra_i2c.h b/arch/arm/include/asm/arch-tegra/tegra_i2c.h
index e57b9ef..c49f432 100644
--- a/arch/arm/include/asm/arch-tegra/tegra_i2c.h
+++ b/arch/arm/include/asm/arch-tegra/tegra_i2c.h
@@ -150,7 +150,7 @@ struct i2c_ctlr {
/**
* Returns the bus number of the DVC controller
*
- * @return number of bus, or -1 if there is no DVC active
+ * Return: number of bus, or -1 if there is no DVC active
*/
int tegra_i2c_get_dvc_bus(struct udevice **busp);
diff --git a/arch/arm/include/asm/arch-tegra/warmboot.h b/arch/arm/include/asm/arch-tegra/warmboot.h
index 3f02073..bfde4c3 100644
--- a/arch/arm/include/asm/arch-tegra/warmboot.h
+++ b/arch/arm/include/asm/arch-tegra/warmboot.h
@@ -121,7 +121,7 @@ union scratch3_reg {
/**
* Save warmboot memory settings for a later resume
*
- * @return 0 if ok, -1 on error
+ * Return: 0 if ok, -1 on error
*/
int warmboot_save_sdram_params(void);
diff --git a/arch/arm/include/asm/arch-tegra124/display.h b/arch/arm/include/asm/arch-tegra124/display.h
index 47e0056..ca3d575 100644
--- a/arch/arm/include/asm/arch-tegra124/display.h
+++ b/arch/arm/include/asm/arch-tegra124/display.h
@@ -16,14 +16,14 @@
*
* @param blob Device tree blob
* @param default_lcd_base Default address of LCD frame buffer
- * @return 0 if ok, -1 on error (unsupported bits per pixel)
+ * Return: 0 if ok, -1 on error (unsupported bits per pixel)
*/
int tegra_display_probe(const void *blob, void *default_lcd_base);
/**
* Return the current display configuration
*
- * @return pointer to display configuration, or NULL if there is no valid
+ * Return: pointer to display configuration, or NULL if there is no valid
* config
*/
struct fdt_disp_config *tegra_display_get_config(void);
diff --git a/arch/arm/include/asm/arch-tegra20/emc.h b/arch/arm/include/asm/arch-tegra20/emc.h
index 58ee08c..65d0e34 100644
--- a/arch/arm/include/asm/arch-tegra20/emc.h
+++ b/arch/arm/include/asm/arch-tegra20/emc.h
@@ -81,7 +81,7 @@ struct emc_ctlr {
*
* @param blob Device tree blob
* @param rate Clock speed of memory controller in Hz (=2x memory bus rate)
- * @return 0 if ok, else -ve error code (look in emc.c to decode it)
+ * Return: 0 if ok, else -ve error code (look in emc.c to decode it)
*/
int tegra_set_emc(const void *blob, unsigned rate);
@@ -89,7 +89,7 @@ int tegra_set_emc(const void *blob, unsigned rate);
* Get a pointer to the EMC controller from the device tree.
*
* @param blob Device tree blob
- * @return pointer to EMC controller
+ * Return: pointer to EMC controller
*/
struct emc_ctlr *emc_get_controller(const void *blob);
diff --git a/arch/arm/include/asm/omap_gpio.h b/arch/arm/include/asm/omap_gpio.h
index 4084210..590a937 100644
--- a/arch/arm/include/asm/omap_gpio.h
+++ b/arch/arm/include/asm/omap_gpio.h
@@ -43,7 +43,7 @@ extern const struct gpio_bank *const omap_gpio_bank;
* Check if gpio is valid.
*
* @param gpio GPIO number
- * @return 1 if ok, 0 on error
+ * Return: 1 if ok, 0 on error
*/
int gpio_is_valid(int gpio);
#endif
diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h
index e45c1bf..eb3da93 100644
--- a/arch/arm/mach-bcm283x/include/mach/msg.h
+++ b/arch/arm/mach-bcm283x/include/mach/msg.h
@@ -10,7 +10,7 @@
* bcm2835_power_on_module() - power on an SoC module
*
* @module: ID of module to power on (BCM2835_MBOX_POWER_DEVID_...)
- * @return 0 if OK, -EIO on error
+ * Return: 0 if OK, -EIO on error
*/
int bcm2835_power_on_module(u32 module);
@@ -18,7 +18,7 @@ int bcm2835_power_on_module(u32 module);
* bcm2835_get_mmc_clock() - get the frequency of the MMC clock
*
* @clock_id: ID of clock to get frequency for
- * @return clock frequency, or -ve on error
+ * Return: clock frequency, or -ve on error
*/
int bcm2835_get_mmc_clock(u32 clock_id);
@@ -27,7 +27,7 @@ int bcm2835_get_mmc_clock(u32 clock_id);
*
* @widthp: Returns the width in pixels
* @heightp: Returns the height in pixels
- * @return 0 if OK, -ve on error
+ * Return: 0 if OK, -ve on error
*/
int bcm2835_get_video_size(int *widthp, int *heightp);
@@ -42,7 +42,7 @@ int bcm2835_get_video_size(int *widthp, int *heightp);
* @fb_basep: Returns base address of frame buffer
* @fb_sizep: Returns size of frame buffer
* @pitchp: Returns number of bytes in each frame buffer line
- * @return 0 if OK, -ve on error
+ * Return: 0 if OK, -ve on error
*/
int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
int pixel_order, int alpha_mode, ulong *fb_basep,
@@ -51,7 +51,7 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
/**
* bcm2711_load_vl805_firmware() - get vl805's firmware loaded
*
- * @return 0 if OK, -EIO on error
+ * Return: 0 if OK, -EIO on error
*/
int bcm2711_notify_vl805_reset(void);
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index 99bca54..f91f2ee 100644
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -1403,7 +1403,7 @@ int exynos5_set_i2s_clk_prescaler(unsigned int src_frq,
* @param target_freq Desired clock frequency in Hz
* @param best_fine_scalar Pointer to store the fine stage divisor
*
- * @return best_main_scalar Main scalar for desired frequency or -1 if none
+ * Return: best_main_scalar Main scalar for desired frequency or -1 if none
* found
*/
static int clock_calc_best_scalar(unsigned int main_scaler_bits,
diff --git a/arch/arm/mach-exynos/clock_init.h b/arch/arm/mach-exynos/clock_init.h
index a4d3fda..8664f10 100644
--- a/arch/arm/mach-exynos/clock_init.h
+++ b/arch/arm/mach-exynos/clock_init.h
@@ -141,7 +141,7 @@ struct mem_timings {
*
* This function can be called from SPL or the main U-Boot.
*
- * @return pointer to the memory timings that we should use
+ * Return: pointer to the memory timings that we should use
*/
struct mem_timings *clock_get_mem_timings(void);
diff --git a/arch/arm/mach-exynos/common_setup.h b/arch/arm/mach-exynos/common_setup.h
index 4e3702b..d7f0223 100644
--- a/arch/arm/mach-exynos/common_setup.h
+++ b/arch/arm/mach-exynos/common_setup.h
@@ -40,7 +40,7 @@ void system_clock_init(void);
/*
* Init subsystems according to the reset status
*
- * @return 0 for a normal boot, non-zero for a resume
+ * Return: 0 for a normal boot, non-zero for a resume
*/
int do_lowlevel_init(void);
diff --git a/arch/arm/mach-exynos/dmc_init_ddr3.c b/arch/arm/mach-exynos/dmc_init_ddr3.c
index 18c558f..fa867f2 100644
--- a/arch/arm/mach-exynos/dmc_init_ddr3.c
+++ b/arch/arm/mach-exynos/dmc_init_ddr3.c
@@ -253,7 +253,7 @@ static const unsigned int test_pattern[] = {
* @param ch DMC channel number
* @param byte_lane which DQS byte offset,
* possible values are 0,1,2,3
- * @return TRUE if memory was good, FALSE if not.
+ * Return: TRUE if memory was good, FALSE if not.
*/
static bool dmc_valid_window_test_vector(int ch, int byte_lane)
{
@@ -323,7 +323,7 @@ static void dmc_set_read_offset_value(struct exynos5420_phy_control *phy_ctrl,
* representations of 0.
*
* @param b The byte to convert in two's complement.
- * @return The 7-bit value + sign bit.
+ * Return: The 7-bit value + sign bit.
*/
unsigned char make_signed_byte(signed char b)
diff --git a/arch/arm/mach-exynos/exynos5_setup.h b/arch/arm/mach-exynos/exynos5_setup.h
index bf4cca9..af7a5af 100644
--- a/arch/arm/mach-exynos/exynos5_setup.h
+++ b/arch/arm/mach-exynos/exynos5_setup.h
@@ -898,7 +898,7 @@ enum {
*
* @param mem Memory timings for this memory type.
* @param reset Reset DDR PHY during initialization.
- * @return 0 if ok, SETUP_ERR_... if there is a problem
+ * Return: 0 if ok, SETUP_ERR_... if there is a problem
*/
int ddr3_mem_ctrl_init(struct mem_timings *mem, int reset);
@@ -913,7 +913,7 @@ void lpddr3_mem_ctrl_init(void);
* @param phy1_con16 Register address for dmc_phy1->phy_con16
* @param phy0_con17 Register address for dmc_phy0->phy_con17
* @param phy1_con17 Register address for dmc_phy1->phy_con17
- * @return 0 if ok, -1 on error
+ * Return: 0 if ok, -1 on error
*/
int dmc_config_zq(struct mem_timings *mem, uint32_t *phy0_con16,
uint32_t *phy1_con16, uint32_t *phy0_con17,
diff --git a/arch/arm/mach-exynos/include/mach/clk.h b/arch/arm/mach-exynos/include/mach/clk.h
index 298535d..cf8db21 100644
--- a/arch/arm/mach-exynos/include/mach/clk.h
+++ b/arch/arm/mach-exynos/include/mach/clk.h
@@ -55,7 +55,7 @@ int set_spi_clk(int periph_id, unsigned int rate);
*
* @param peripheral Peripheral id
*
- * @return frequency of the peripheral clk
+ * Return: frequency of the peripheral clk
*/
unsigned long clock_get_periph_rate(int peripheral);
diff --git a/arch/arm/mach-exynos/include/mach/pinmux.h b/arch/arm/mach-exynos/include/mach/pinmux.h
index bd1ad5f..5ef04e7 100644
--- a/arch/arm/mach-exynos/include/mach/pinmux.h
+++ b/arch/arm/mach-exynos/include/mach/pinmux.h
@@ -37,7 +37,7 @@ enum {
*
* @param peripheral peripheral to be configured
* @param flags configure flags
- * @return 0 if ok, -1 on error (e.g. unsupported peripheral)
+ * Return: 0 if ok, -1 on error (e.g. unsupported peripheral)
*/
int exynos_pinmux_config(int peripheral, int flags);
@@ -46,7 +46,7 @@ int exynos_pinmux_config(int peripheral, int flags);
*
* @param blob Device tree blob
* @param node FDT I2C node to find
- * @return peripheral id if ok, PERIPH_ID_NONE on error
+ * Return: peripheral id if ok, PERIPH_ID_NONE on error
*/
int pinmux_decode_periph_id(const void *blob, int node);
#endif
diff --git a/arch/arm/mach-exynos/include/mach/spl.h b/arch/arm/mach-exynos/include/mach/spl.h
index 9d64246..816c852 100644
--- a/arch/arm/mach-exynos/include/mach/spl.h
+++ b/arch/arm/mach-exynos/include/mach/spl.h
@@ -62,7 +62,7 @@ struct spl_machine_param {
* Validate signature and return a pointer to the parameter table. If the
* signature is invalid, call panic() and never return.
*
- * @return pointer to the parameter table if signature matched or never return.
+ * Return: pointer to the parameter table if signature matched or never return.
*/
struct spl_machine_param *spl_get_machine_params(void);
diff --git a/arch/arm/mach-imx/ddrmc-vf610-calibration.h b/arch/arm/mach-imx/ddrmc-vf610-calibration.h
index e82e217..56fffe1 100644
--- a/arch/arm/mach-imx/ddrmc-vf610-calibration.h
+++ b/arch/arm/mach-imx/ddrmc-vf610-calibration.h
@@ -38,7 +38,7 @@ enum edge {
*
* @param ddrmr_regs - memory controller registers
*
- * @return 0 on success, otherwise error code
+ * Return: 0 on success, otherwise error code
*/
int ddrmc_calibration(struct ddrmr_regs *ddrmr);
diff --git a/arch/arm/mach-s5pc1xx/include/mach/pinmux.h b/arch/arm/mach-s5pc1xx/include/mach/pinmux.h
index 075cdce..9447a49 100644
--- a/arch/arm/mach-s5pc1xx/include/mach/pinmux.h
+++ b/arch/arm/mach-s5pc1xx/include/mach/pinmux.h
@@ -34,7 +34,7 @@ enum {
*
* @param peripheral peripheral to be configured
* @param flags configure flags
- * @return 0 if ok, -1 on error (e.g. unsupported peripheral)
+ * Return: 0 if ok, -1 on error (e.g. unsupported peripheral)
*/
int exynos_pinmux_config(int peripheral, int flags);
@@ -43,7 +43,7 @@ int exynos_pinmux_config(int peripheral, int flags);
*
* @param blob Device tree blob
* @param node FDT I2C node to find
- * @return peripheral id if ok, PERIPH_ID_NONE on error
+ * Return: peripheral id if ok, PERIPH_ID_NONE on error
*/
int pinmux_decode_periph_id(const void *blob, int node);
#endif
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
index 7de6266..2932eae 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
@@ -366,7 +366,7 @@ static u8 stm32prog_start(struct stm32prog_data *data, u32 address)
* get_address() - Get address if it is valid
*
* @tmp_xor: Current xor value to update
- * @return The address area
+ * Return: The address area
*/
static u32 get_address(u8 *tmp_xor)
{
@@ -791,7 +791,7 @@ error:
* stm32prog_serial_loop() - USART bootloader Loop routine
*
* @data: Current command context
- * @return true if reset is needed after loop
+ * Return: true if reset is needed after loop
*/
bool stm32prog_serial_loop(struct stm32prog_data *data)
{
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 18c19db..77c8ad9 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -243,7 +243,7 @@ void clock_ll_set_source(enum periph_id periph_id, unsigned source)
* @param divider_bits number of divider bits (8 or 16)
* @param parent_rate clock rate of parent clock in Hz
* @param rate required clock rate for this clock
- * @return divider which should be used
+ * Return: divider which should be used
*/
static int clk_get_divider(unsigned divider_bits, unsigned long parent_rate,
unsigned long rate)
@@ -297,7 +297,7 @@ int clock_set_pllout(enum clock_id clkid, enum pll_out_id pllout, unsigned rate)
*
* @param parent_rate clock rate of parent clock in Hz
* @param divider which should be used in 7.1 format
- * @return effective clock rate of peripheral
+ * Return: effective clock rate of peripheral
*/
static unsigned long get_rate_from_divider(unsigned long parent_rate,
int divider)
@@ -365,7 +365,7 @@ unsigned long clock_get_periph_rate(enum periph_id periph_id,
* @param rate required clock rate for this clock
* @param extra_div value for the second-stage divisor (not set if this
* function returns -1.
- * @return divider which should be used, or -1 if nothing is valid
+ * Return: divider which should be used, or -1 if nothing is valid
*
*/
static int find_best_divider(unsigned divider_bits, unsigned long parent_rate,
@@ -403,7 +403,7 @@ static int find_best_divider(unsigned divider_bits, unsigned long parent_rate,
* @param source Source number (0-3 or 0-7)
* @param mux_bits Number of mux bits (2 or 4)
* @param divider Required divider in 7.1 or 15.1 format
- * @return 0 if ok, -1 on error (requesting a parent clock which is not valid
+ * Return: 0 if ok, -1 on error (requesting a parent clock which is not valid
* for this peripheral)
*/
static int adjust_periph_pll(enum periph_id periph_id, int source,
@@ -586,7 +586,7 @@ unsigned clock_get_rate(enum clock_id clkid)
* @param m PLL input divider(DIVN)
* @param p post divider(DIVP)
* @param cpcon base PLL charge pump(CPCON)
- * @return 0 if ok, -1 on error (the requested PLL is incorrect and cannot
+ * Return: 0 if ok, -1 on error (the requested PLL is incorrect and cannot
* be overridden), 1 if PLL is already correct
*/
int clock_set_rate(enum clock_id clkid, u32 n, u32 m, u32 p, u32 cpcon)
diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c
index 167589d..703a231 100644
--- a/arch/arm/mach-tegra/tegra114/clock.c
+++ b/arch/arm/mach-tegra/tegra114/clock.c
@@ -553,7 +553,7 @@ enum clock_id get_periph_clock_id(enum periph_id periph_id, int source)
* @param source PLL id of required parent clock
* @param mux_bits Set to number of bits in mux register: 2 or 4
* @param divider_bits Set to number of divider bits (8 or 16)
- * @return mux value (0-4, or -1 if not found)
+ * Return: mux value (0-4, or -1 if not found)
*/
int get_periph_clock_source(enum periph_id periph_id,
enum clock_id parent, int *mux_bits, int *divider_bits)
@@ -623,7 +623,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
* provided.
*
* @param clk_id Clock ID according to tegra114 device tree binding
- * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
+ * Return: peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
*/
enum periph_id clk_id_to_periph_id(int clk_id)
{
diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c
index 79e67f5..bbfe184 100644
--- a/arch/arm/mach-tegra/tegra124/clock.c
+++ b/arch/arm/mach-tegra/tegra124/clock.c
@@ -699,7 +699,7 @@ enum clock_id get_periph_clock_id(enum periph_id periph_id, int source)
* @param source PLL id of required parent clock
* @param mux_bits Set to number of bits in mux register: 2 or 4
* @param divider_bits Set to number of divider bits (8 or 16)
- * @return mux value (0-4, or -1 if not found)
+ * Return: mux value (0-4, or -1 if not found)
*/
int get_periph_clock_source(enum periph_id periph_id,
enum clock_id parent, int *mux_bits, int *divider_bits)
@@ -773,7 +773,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
* provided.
*
* @param clk_id Clock ID according to tegra124 device tree binding
- * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
+ * Return: peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
*/
enum periph_id clk_id_to_periph_id(int clk_id)
{
@@ -899,7 +899,7 @@ void clock_early_init(void)
* Check a register that we set up to see if clock_early_init() has already
* been called.
*
- * @return true if clock_early_init() was called, false if not
+ * Return: true if clock_early_init() was called, false if not
*/
bool clock_early_init_done(void)
{
diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c
index 24e8a13..3b50a81 100644
--- a/arch/arm/mach-tegra/tegra20/clock.c
+++ b/arch/arm/mach-tegra/tegra20/clock.c
@@ -476,7 +476,7 @@ enum clock_id get_periph_clock_id(enum periph_id periph_id, int source)
* @param source PLL id of required parent clock
* @param mux_bits Set to number of bits in mux register: 2 or 4
* @param divider_bits Set to number of divider bits (8 or 16)
- * @return mux value (0-4, or -1 if not found)
+ * Return: mux value (0-4, or -1 if not found)
*/
int get_periph_clock_source(enum periph_id periph_id,
enum clock_id parent, int *mux_bits, int *divider_bits)
@@ -548,7 +548,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
* provided.
*
* @param clk_id Clock ID according to tegra20 device tree binding
- * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
+ * Return: peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
*/
enum periph_id clk_id_to_periph_id(int clk_id)
{
diff --git a/arch/arm/mach-tegra/tegra20/emc.c b/arch/arm/mach-tegra/tegra20/emc.c
index d55b09b..fb5e699 100644
--- a/arch/arm/mach-tegra/tegra20/emc.c
+++ b/arch/arm/mach-tegra/tegra20/emc.c
@@ -113,7 +113,7 @@ enum {
* @param blob Device tree blob
* @param node EMC node (nvidia,tegra20-emc compatible string)
* @param ram_code RAM code to select (0-3, or -1 if unknown)
- * @return 0 if ok, otherwise a -ve ERR_ code (see enum above)
+ * Return: 0 if ok, otherwise a -ve ERR_ code (see enum above)
*/
static int find_emc_tables(const void *blob, int node, int ram_code)
{
@@ -167,7 +167,7 @@ static int find_emc_tables(const void *blob, int node, int ram_code)
* @param tablep Returns pointer to table to program into EMC. There are
* TEGRA_EMC_NUM_REGS entries, destined for offsets as per the
* emc_reg_addr array.
- * @return 0 if ok, otherwise a -ve error code which will allow someone to
+ * Return: 0 if ok, otherwise a -ve error code which will allow someone to
* figure out roughly what went wrong by looking at this code.
*/
static int decode_emc(const void *blob, unsigned rate, struct emc_ctlr **emcp,
diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c
index ccc64eb..10c2478 100644
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -791,7 +791,7 @@ enum clock_id get_periph_clock_id(enum periph_id periph_id, int source)
* @param source PLL id of required parent clock
* @param mux_bits Set to number of bits in mux register: 2 or 4
* @param divider_bits Set to number of divider bits (8 or 16)
- * @return mux value (0-4, or -1 if not found)
+ * Return: mux value (0-4, or -1 if not found)
*/
int get_periph_clock_source(enum periph_id periph_id,
enum clock_id parent, int *mux_bits, int *divider_bits)
@@ -871,7 +871,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
* provided.
*
* @param clk_id Clock ID according to tegra210 device tree binding
- * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
+ * Return: peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
*/
enum periph_id clk_id_to_periph_id(int clk_id)
{
diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c
index b0641c6..c835cd0 100644
--- a/arch/arm/mach-tegra/tegra30/clock.c
+++ b/arch/arm/mach-tegra/tegra30/clock.c
@@ -533,7 +533,7 @@ enum clock_id get_periph_clock_id(enum periph_id periph_id, int source)
* @param source PLL id of required parent clock
* @param mux_bits Set to number of bits in mux register: 2 or 4
* @param divider_bits Set to number of divider bits (8 or 16)
- * @return mux value (0-4, or -1 if not found)
+ * Return: mux value (0-4, or -1 if not found)
*/
int get_periph_clock_source(enum periph_id periph_id,
enum clock_id parent, int *mux_bits, int *divider_bits)
@@ -603,7 +603,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
* provided.
*
* @param clk_id Clock ID according to tegra30 device tree binding
- * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
+ * Return: peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
*/
enum periph_id clk_id_to_periph_id(int clk_id)
{