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-rw-r--r--arch/arm/mach-socfpga/include/mach/clock_manager.h2
-rw-r--r--arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h4
-rw-r--r--arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h4
-rw-r--r--arch/arm/mach-socfpga/include/mach/sdram_arria10.h2
4 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h b/arch/arm/mach-socfpga/include/mach/clock_manager.h
index c683058..1f734bc 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h
@@ -8,7 +8,7 @@
phys_addr_t socfpga_get_clkmgr_addr(void);
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
void cm_wait_for_lock(u32 mask);
int cm_wait_for_fsm(void);
void cm_print_clock_quick_summary(void);
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
index 23f280d..8d62d75 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
@@ -6,7 +6,7 @@
#ifndef CLOCK_MANAGER_ARRIA10
#define CLOCK_MANAGER_ARRIA10
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
/* Clock manager group */
#define CLKMGR_A10_CTRL 0x00
@@ -69,7 +69,7 @@ unsigned long cm_get_mpu_clk_hz(void);
unsigned int cm_get_qspi_controller_clk_hz(void);
-#endif /* __ASSEMBLER__ */
+#endif /* __ASSEMBLY__ */
#define LOCKED_MASK (CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_SET_MSK | \
CLKMGR_CLKMGR_STAT_PERPLLLOCKED_SET_MSK)
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
index 0865509..fc6d2301 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
@@ -6,7 +6,7 @@
#ifndef _CLOCK_MANAGER_GEN5_H_
#define _CLOCK_MANAGER_GEN5_H_
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
struct cm_config {
/* main group */
@@ -107,7 +107,7 @@ const unsigned int cm_get_f2s_sdr_ref_clk_hz(void);
/* Clock configuration accessors */
int cm_basic_init(const struct cm_config * const cfg);
const struct cm_config * const cm_get_default_config(void);
-#endif /* __ASSEMBLER__ */
+#endif /* __ASSEMBLY__ */
#define LOCKED_MASK \
(CLKMGR_INTER_SDRPLLLOCKED_MASK | \
diff --git a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
index 25b82fb..f277388 100644
--- a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
@@ -205,7 +205,7 @@ struct socfpga_io48_mmr {
u32 niosreserve2;
};
-#endif /*__ASSEMBLY__*/
+#endif /*__ASSEMBLY__ */
#define IO48_MMR_CTRLCFG0_DB2_BURST_LENGTH_MASK 0x1F000000
#define IO48_MMR_CTRLCFG0_DB2_BURST_LENGTH_SHIFT 24