diff options
Diffstat (limited to 'arch/arm/mach-socfpga')
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/base_addr_ac5.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/misc.h | 9 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/misc_gen5.c | 9 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/spl_gen5.c | 10 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/wrap_sdram_config.c | 4 |
5 files changed, 27 insertions, 6 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h b/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h index bb9e3fa..2725e9f 100644 --- a/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h +++ b/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h @@ -6,6 +6,7 @@ #ifndef _SOCFPGA_BASE_ADDRS_H_ #define _SOCFPGA_BASE_ADDRS_H_ +#define SOCFPGA_FPGA_SLAVES_ADDRESS 0xc0000000 #define SOCFPGA_STM_ADDRESS 0xfc000000 #define SOCFPGA_DAP_ADDRESS 0xff000000 #define SOCFPGA_EMAC0_ADDRESS 0xff700000 diff --git a/arch/arm/mach-socfpga/include/mach/misc.h b/arch/arm/mach-socfpga/include/mach/misc.h index 4fc9570..2660992 100644 --- a/arch/arm/mach-socfpga/include/mach/misc.h +++ b/arch/arm/mach-socfpga/include/mach/misc.h @@ -6,6 +6,8 @@ #ifndef _MISC_H_ #define _MISC_H_ +#include <asm/sections.h> + void dwmac_deassert_reset(const unsigned int of_reset_id, const u32 phymode); struct bsel { @@ -23,6 +25,13 @@ static inline void socfpga_fpga_add(void) {} #ifdef CONFIG_TARGET_SOCFPGA_GEN5 void socfpga_sdram_remap_zero(void); +static inline bool socfpga_is_booting_from_fpga(void) +{ + if ((__image_copy_start >= (char *)SOCFPGA_FPGA_SLAVES_ADDRESS) && + (__image_copy_start < (char *)SOCFPGA_STM_ADDRESS)) + return true; + return false; +} #endif #ifdef CONFIG_TARGET_SOCFPGA_ARRIA10 diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c index 429c3d6..5fa4093 100644 --- a/arch/arm/mach-socfpga/misc_gen5.c +++ b/arch/arm/mach-socfpga/misc_gen5.c @@ -177,6 +177,8 @@ static void socfpga_nic301_slave_ns(void) void socfpga_sdram_remap_zero(void) { + u32 remap; + socfpga_nic301_slave_ns(); /* @@ -187,7 +189,12 @@ void socfpga_sdram_remap_zero(void) setbits_le32(&scu_regs->sacr, 0xfff); /* Configure the L2 controller to make SDRAM start at 0 */ - writel(0x1, &nic301_regs->remap); /* remap.mpuzero */ + remap = 0x1; /* remap.mpuzero */ + /* Keep fpga bridge enabled when running from FPGA onchip RAM */ + if (socfpga_is_booting_from_fpga()) + remap |= 0x8; /* remap.hps2fpga */ + writel(remap, &nic301_regs->remap); + writel(0x1, &pl310->pl310_addr_filter_start); } diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index be318cc..ccdc661 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -92,8 +92,11 @@ void board_init_f(ulong dummy) /* Put everything into reset but L4WD0. */ socfpga_per_reset_all(); - /* Put FPGA bridges into reset too. */ - socfpga_bridges_reset(1); + + if (!socfpga_is_booting_from_fpga()) { + /* Put FPGA bridges into reset too. */ + socfpga_bridges_reset(1); + } socfpga_per_reset(SOCFPGA_RESET(SDR), 0); socfpga_per_reset(SOCFPGA_RESET(UART0), 0); @@ -163,5 +166,6 @@ void board_init_f(ulong dummy) hang(); } - socfpga_bridges_reset(1); + if (!socfpga_is_booting_from_fpga()) + socfpga_bridges_reset(1); } diff --git a/arch/arm/mach-socfpga/wrap_sdram_config.c b/arch/arm/mach-socfpga/wrap_sdram_config.c index 8cfacc7..2b072cc 100644 --- a/arch/arm/mach-socfpga/wrap_sdram_config.c +++ b/arch/arm/mach-socfpga/wrap_sdram_config.c @@ -251,7 +251,7 @@ static const struct socfpga_sdram_rw_mgr_config rw_mgr_config = { RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS, }; -struct socfpga_sdram_io_config io_config = { +static const struct socfpga_sdram_io_config io_config = { .delay_per_dchain_tap = IO_DELAY_PER_DCHAIN_TAP, .delay_per_dqs_en_dchain_tap = IO_DELAY_PER_DQS_EN_DCHAIN_TAP, .delay_per_opa_tap = IO_DELAY_PER_OPA_TAP, @@ -269,7 +269,7 @@ struct socfpga_sdram_io_config io_config = { .shift_dqs_en_when_shift_dqs = IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS, }; -struct socfpga_sdram_misc_config misc_config = { +static const struct socfpga_sdram_misc_config misc_config = { .afi_rate_ratio = AFI_RATE_RATIO, .calib_lfifo_offset = CALIB_LFIFO_OFFSET, .calib_vfifo_offset = CALIB_VFIFO_OFFSET, |