diff options
| -rw-r--r-- | drivers/misc/imx8/scu_api.c | 78 | ||||
| -rw-r--r-- | include/firmware/imx/sci/rpc.h | 27 | ||||
| -rw-r--r-- | include/firmware/imx/sci/sci.h | 24 | ||||
| -rw-r--r-- | include/firmware/imx/sci/svc/misc/api.h | 42 | ||||
| -rw-r--r-- | include/firmware/imx/sci/svc/pm/api.h | 94 | ||||
| -rw-r--r-- | include/firmware/imx/sci/svc/rm/api.h | 14 | ||||
| -rw-r--r-- | include/firmware/imx/sci/svc/seco/api.h | 5 | ||||
| -rw-r--r-- | include/firmware/imx/sci/svc/timer/api.h | 33 |
8 files changed, 287 insertions, 30 deletions
diff --git a/drivers/misc/imx8/scu_api.c b/drivers/misc/imx8/scu_api.c index dfede7f..3e3002b 100644 --- a/drivers/misc/imx8/scu_api.c +++ b/drivers/misc/imx8/scu_api.c @@ -481,6 +481,22 @@ int sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, sc_misc_temp_t temp, return 0; } +void sc_misc_get_button_status(sc_ipc_t ipc, sc_bool_t *status) +{ + struct sc_rpc_msg_s msg; + struct udevice *dev = gd->arch.scu_dev; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = (u8)(SC_RPC_SVC_MISC); + RPC_FUNC(&msg) = (u8)(MISC_FUNC_GET_BUTTON_STATUS); + + misc_call(dev, SC_FALSE, &msg, 1U, &msg, 1U); + + if (status) + *status = (sc_bool_t)(!!(RPC_U8(&msg, 0U))); +} + /* RM */ sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr) { @@ -851,6 +867,21 @@ int sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable, return ret; } +void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = (u8)(PM_FUNC_REBOOT); + RPC_U8(&msg, 0U) = (u8)(type); + RPC_SIZE(&msg) = 2U; + + misc_call(dev, SC_TRUE, &msg, size, &msg, size); +} + int sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_power_mode_t *mode) { @@ -877,6 +908,28 @@ int sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, return ret; } +int sc_timer_set_wdog_window(sc_ipc_t ipc, sc_timer_wdog_time_t window) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 2U; + RPC_SVC(&msg) = (u8)(SC_RPC_SVC_TIMER); + RPC_FUNC(&msg) = (u8)(TIMER_FUNC_SET_WDOG_WINDOW); + + RPC_U32(&msg, 0U) = (u32)(window); + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) + printf("%s: window:%u: res:%d\n", + __func__, window, RPC_R8(&msg)); + + return ret; +} + int sc_seco_authenticate(sc_ipc_t ipc, sc_seco_auth_cmd_t cmd, sc_faddr_t addr) { @@ -974,6 +1027,31 @@ void sc_seco_build_info(sc_ipc_t ipc, u32 *version, u32 *commit) *commit = RPC_U32(&msg, 4U); } +int sc_seco_v2x_build_info(sc_ipc_t ipc, u32 *version, u32 *commit) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SIZE(&msg) = 1U; + RPC_SVC(&msg) = (u8)(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = (u8)(SECO_FUNC_V2X_BUILD_INFO); + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) + printf("%s: res:%d\n", __func__, RPC_R8(&msg)); + + if (version) + *version = RPC_U32(&msg, 0U); + + if (commit) + *commit = RPC_U32(&msg, 4U); + + return ret; +} + int sc_seco_get_event(sc_ipc_t ipc, u8 idx, u32 *event) { struct udevice *dev = gd->arch.scu_dev; diff --git a/include/firmware/imx/sci/rpc.h b/include/firmware/imx/sci/rpc.h index 39de7f0..85af6f3 100644 --- a/include/firmware/imx/sci/rpc.h +++ b/include/firmware/imx/sci/rpc.h @@ -23,12 +23,12 @@ #define RPC_FUNC(MSG) ((MSG)->func) #define RPC_R8(MSG) ((MSG)->func) #define RPC_I64(MSG, IDX) ((s64)(RPC_U32((MSG), (IDX))) << 32ULL) | \ - (s64)(RPC_U32((MSG), (IDX) + 4U)) + (s64)(RPC_U32((MSG), (IDX) + 4U)) #define RPC_I32(MSG, IDX) ((MSG)->DATA.i32[(IDX) / 4U]) #define RPC_I16(MSG, IDX) ((MSG)->DATA.i16[(IDX) / 2U]) #define RPC_I8(MSG, IDX) ((MSG)->DATA.i8[(IDX)]) #define RPC_U64(MSG, IDX) ((u64)(RPC_U32((MSG), (IDX))) << 32ULL) | \ - (u64)(RPC_U32((MSG), (IDX) + 4U)) + (u64)(RPC_U32((MSG), (IDX) + 4U)) #define RPC_U32(MSG, IDX) ((MSG)->DATA.u32[(IDX) / 4U]) #define RPC_U16(MSG, IDX) ((MSG)->DATA.u16[(IDX) / 2U]) #define RPC_U8(MSG, IDX) ((MSG)->DATA.u8[(IDX)]) @@ -67,7 +67,9 @@ struct sc_rpc_msg_s { #define PM_FUNC_SET_SYS_POWER_MODE 19U #define PM_FUNC_SET_PARTITION_POWER_MODE 1U #define PM_FUNC_GET_SYS_POWER_MODE 2U +#define PM_FUNC_PARTITION_WAKE 28U #define PM_FUNC_SET_RESOURCE_POWER_MODE 3U +#define PM_FUNC_SET_RESOURCE_POWER_MODE_ALL 22U #define PM_FUNC_GET_RESOURCE_POWER_MODE 4U #define PM_FUNC_REQ_LOW_POWER_MODE 16U #define PM_FUNC_REQ_CPU_LOW_POWER_MODE 20U @@ -81,13 +83,16 @@ struct sc_rpc_msg_s { #define PM_FUNC_GET_CLOCK_PARENT 15U #define PM_FUNC_RESET 13U #define PM_FUNC_RESET_REASON 10U +#define PM_FUNC_GET_RESET_PART 26U #define PM_FUNC_BOOT 8U +#define PM_FUNC_SET_BOOT_PARM 27U #define PM_FUNC_REBOOT 9U #define PM_FUNC_REBOOT_PARTITION 12U +#define PM_FUNC_REBOOT_CONTINUE 25U #define PM_FUNC_CPU_START 11U #define PM_FUNC_CPU_RESET 23U #define PM_FUNC_RESOURCE_RESET 29U -#define PM_FUNC_IS_PARTITION_STARTED 24U +#define PM_FUNC_IS_PARTITION_STARTED 24U /* MISC RPC */ #define MISC_FUNC_UNKNOWN 0 @@ -95,16 +100,10 @@ struct sc_rpc_msg_s { #define MISC_FUNC_GET_CONTROL 2U #define MISC_FUNC_SET_MAX_DMA_GROUP 4U #define MISC_FUNC_SET_DMA_GROUP 5U -#define MISC_FUNC_SECO_IMAGE_LOAD 8U -#define MISC_FUNC_SECO_AUTHENTICATE 9U -#define MISC_FUNC_SECO_FUSE_WRITE 20U -#define MISC_FUNC_SECO_ENABLE_DEBUG 21U -#define MISC_FUNC_SECO_FORWARD_LIFECYCLE 22U -#define MISC_FUNC_SECO_RETURN_LIFECYCLE 23U -#define MISC_FUNC_SECO_BUILD_INFO 24U #define MISC_FUNC_DEBUG_OUT 10U #define MISC_FUNC_WAVEFORM_CAPTURE 6U #define MISC_FUNC_BUILD_INFO 15U +#define MISC_FUNC_API_VER 35U #define MISC_FUNC_UNIQUE_ID 19U #define MISC_FUNC_SET_ARI 3U #define MISC_FUNC_BOOT_STATUS 7U @@ -114,8 +113,11 @@ struct sc_rpc_msg_s { #define MISC_FUNC_SET_TEMP 12U #define MISC_FUNC_GET_TEMP 13U #define MISC_FUNC_GET_BOOT_DEV 16U +#define MISC_FUNC_GET_BOOT_TYPE 33U +#define MISC_FUNC_GET_BOOT_CONTAINER 36U #define MISC_FUNC_GET_BUTTON_STATUS 18U -#define MISC_FUNC_GET_BOOT_CONTAINER 36U +#define MISC_FUNC_ROMPATCH_CHECKSUM 26U +#define MISC_FUNC_BOARD_IOCTL 34U /* PAD RPC */ #define PAD_FUNC_UNKNOWN 0 @@ -160,6 +162,7 @@ struct sc_rpc_msg_s { #define RM_FUNC_GET_RESOURCE_INFO 16U #define RM_FUNC_MEMREG_ALLOC 17U #define RM_FUNC_MEMREG_SPLIT 29U +#define RM_FUNC_MEMREG_FRAG 32U #define RM_FUNC_MEMREG_FREE 18U #define RM_FUNC_FIND_MEMREG 30U #define RM_FUNC_ASSIGN_MEMREG 19U @@ -190,6 +193,7 @@ struct sc_rpc_msg_s { #define SECO_FUNC_UPDATE_MPMR 14U /* Index for seco_update_mpmr() RPC call */ #define SECO_FUNC_GET_MP_SIGN 15U /* Index for seco_get_mp_sign() RPC call */ #define SECO_FUNC_BUILD_INFO 16U /* Index for seco_build_info() RPC call */ +#define SECO_FUNC_V2X_BUILD_INFO 30U /* Index for sc_seco_v2x_build_info() RPC call */ #define SECO_FUNC_CHIP_INFO 17U /* Index for seco_chip_info() RPC call */ #define SECO_FUNC_ENABLE_DEBUG 18U /* Index for seco_enable_debug() RPC call */ #define SECO_FUNC_GET_EVENT 19U /* Index for seco_get_event() RPC call */ @@ -210,6 +214,7 @@ struct sc_rpc_msg_s { #define TIMER_FUNC_UNKNOWN 0 /* Unknown function */ #define TIMER_FUNC_SET_WDOG_TIMEOUT 1U /* Index for sc_timer_set_wdog_timeout() RPC call */ #define TIMER_FUNC_SET_WDOG_PRE_TIMEOUT 12U /* Index for sc_timer_set_wdog_pre_timeout() RPC call */ +#define TIMER_FUNC_SET_WDOG_WINDOW 19U /* Index for sc_timer_set_wdog_window() RPC call */ #define TIMER_FUNC_START_WDOG 2U /* Index for sc_timer_start_wdog() RPC call */ #define TIMER_FUNC_STOP_WDOG 3U /* Index for sc_timer_stop_wdog() RPC call */ #define TIMER_FUNC_PING_WDOG 4U /* Index for sc_timer_ping_wdog() RPC call */ diff --git a/include/firmware/imx/sci/sci.h b/include/firmware/imx/sci/sci.h index 61c8211..f832982 100644 --- a/include/firmware/imx/sci/sci.h +++ b/include/firmware/imx/sci/sci.h @@ -13,6 +13,7 @@ #include <firmware/imx/sci/svc/pm/api.h> #include <firmware/imx/sci/svc/rm/api.h> #include <firmware/imx/sci/svc/seco/api.h> +#include <firmware/imx/sci/svc/timer/api.h> #include <firmware/imx/sci/rpc.h> #include <dt-bindings/soc/imx_rsrc.h> #include <linux/errno.h> @@ -73,6 +74,7 @@ int sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, sc_pm_clk_parent_t parent); int sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable, sc_faddr_t address); +void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type); sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt); int sc_pm_resource_reset(sc_ipc_t ipc, sc_rsrc_t resource); @@ -88,6 +90,7 @@ void sc_misc_build_info(sc_ipc_t ipc, u32 *build, u32 *commit); int sc_misc_otp_fuse_read(sc_ipc_t ipc, u32 word, u32 *val); int sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, sc_misc_temp_t temp, s16 *celsius, s8 *tenths); +void sc_misc_get_button_status(sc_ipc_t ipc, sc_bool_t *status); /* RM API */ sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr); @@ -117,6 +120,9 @@ int sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val); /* SMMU API */ int sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_sid_t sid); +/* Timer API */ +int sc_timer_set_wdog_window(sc_ipc_t ipc, sc_timer_wdog_time_t window); + /* SECO API */ int sc_seco_authenticate(sc_ipc_t ipc, sc_seco_auth_cmd_t cmd, sc_faddr_t addr); @@ -124,6 +130,7 @@ int sc_seco_forward_lifecycle(sc_ipc_t ipc, u32 change); int sc_seco_chip_info(sc_ipc_t ipc, u16 *lc, u16 *monotonic, u32 *uid_l, u32 *uid_h); void sc_seco_build_info(sc_ipc_t ipc, u32 *version, u32 *commit); +int sc_seco_v2x_build_info(sc_ipc_t ipc, u32 *version, u32 *commit); int sc_seco_get_event(sc_ipc_t ipc, u8 idx, u32 *event); int sc_seco_gen_key_blob(sc_ipc_t ipc, u32 id, sc_faddr_t load_addr, sc_faddr_t export_addr, u16 max_size); @@ -374,6 +381,23 @@ static inline int sc_seco_secvio_config(sc_ipc_t ipc, u8 id, u8 access, u32 *dat return -EOPNOTSUPP; } +static inline void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type) +{ +} + +static inline int sc_seco_v2x_build_info(sc_ipc_t ipc, u32 *version, u32 *commit) +{ + return -EOPNOTSUPP; +} + +static inline void sc_misc_get_button_status(sc_ipc_t ipc, sc_bool_t *status) +{ +} + +static inline int sc_timer_set_wdog_window(sc_ipc_t ipc, sc_timer_wdog_time_t window) +{ + return -EOPNOTSUPP; +} #endif #endif diff --git a/include/firmware/imx/sci/svc/misc/api.h b/include/firmware/imx/sci/svc/misc/api.h index 3629eb6..a4b92b8 100644 --- a/include/firmware/imx/sci/svc/misc/api.h +++ b/include/firmware/imx/sci/svc/misc/api.h @@ -5,27 +5,45 @@ #ifndef SC_MISC_API_H #define SC_MISC_API_H +/* Defines for type widths */ +#define SC_MISC_DMA_GRP_W 5U /* Width of sc_misc_dma_group_t */ +/* Max DMA channel priority group */ +#define SC_MISC_DMA_GRP_MAX 31U /* Defines for sc_misc_boot_status_t */ #define SC_MISC_BOOT_STATUS_SUCCESS 0U /* Success */ #define SC_MISC_BOOT_STATUS_SECURITY 1U /* Security violation */ -/* Defines for sc_misc_seco_auth_cmd_t */ -#define SC_MISC_SECO_AUTH_SECO_FW 0U /* SECO Firmware */ -#define SC_MISC_SECO_AUTH_HDMI_TX_FW 1U /* HDMI TX Firmware */ -#define SC_MISC_SECO_AUTH_HDMI_RX_FW 2U /* HDMI RX Firmware */ - /* Defines for sc_misc_temp_t */ -#define SC_MISC_TEMP 0U /* Temp sensor */ -#define SC_MISC_TEMP_HIGH 1U /* Temp high alarm */ -#define SC_MISC_TEMP_LOW 2U /* Temp low alarm */ +#define SC_MISC_TEMP 0U /* Temp sensor */ +#define SC_MISC_TEMP_HIGH 1U /* Temp high alarm */ +#define SC_MISC_TEMP_LOW 2U /* Temp low alarm */ + +/* Defines for sc_misc_bt_t */ +#define SC_MISC_BT_PRIMARY 0U /* Primary boot */ +#define SC_MISC_BT_SECONDARY 1U /* Secondary boot */ +#define SC_MISC_BT_RECOVERY 2U /* Recovery boot */ +#define SC_MISC_BT_MANUFACTURE 3U /* Manufacture boot */ +#define SC_MISC_BT_SERIAL 4U /* Serial boot */ +/* Types */ -/* Defines for sc_misc_seco_auth_cmd_t */ -#define SC_MISC_AUTH_CONTAINER 0U /* Authenticate container */ -#define SC_MISC_VERIFY_IMAGE 1U /* Verify image */ -#define SC_MISC_REL_CONTAINER 2U /* Release container */ +/* + * This type is used to store a DMA channel priority group. + */ +typedef u8 sc_misc_dma_group_t; +/* + * This type is used report boot status. + */ typedef u8 sc_misc_boot_status_t; + +/* + * This type is used report boot status. + */ typedef u8 sc_misc_temp_t; +/* + * This type is used report the boot type. + */ +typedef u8 sc_misc_bt_t; #endif /* SC_MISC_API_H */ diff --git a/include/firmware/imx/sci/svc/pm/api.h b/include/firmware/imx/sci/svc/pm/api.h index 9008b85..d1b085d 100644 --- a/include/firmware/imx/sci/svc/pm/api.h +++ b/include/firmware/imx/sci/svc/pm/api.h @@ -6,6 +6,14 @@ #ifndef SC_PM_API_H #define SC_PM_API_H +#include <firmware/imx/sci/types.h> +/* Defines for type widths */ +#define SC_PM_POWER_MODE_W 2U /* Width of sc_pm_power_mode_t */ +#define SC_PM_CLOCK_MODE_W 3U /* Width of sc_pm_clock_mode_t */ +#define SC_PM_RESET_TYPE_W 2U /* Width of sc_pm_reset_type_t */ +#define SC_PM_RESET_REASON_W 4U /* Width of sc_pm_reset_reason_t */ +/* Defines for ALL parameters */ +#define SC_PM_CLK_ALL ((sc_pm_clk_t)UINT8_MAX) /* All clocks */ /* Defines for sc_pm_power_mode_t */ #define SC_PM_PW_MODE_OFF 0U /* Power off */ #define SC_PM_PW_MODE_STBY 1U /* Power in standby */ @@ -35,10 +43,96 @@ #define SC_PM_CLK_MODE_AUTOGATE_HW 4U /* Clock is in HW autogate mode */ #define SC_PM_CLK_MODE_AUTOGATE_SW_HW 5U /* Clock is in SW-HW autogate mode */ +/* Defines for sc_pm_clk_parent_t */ +#define SC_PM_PARENT_XTAL 0U /*!< Parent is XTAL. */ +#define SC_PM_PARENT_PLL0 1U /*!< Parent is PLL0 */ +#define SC_PM_PARENT_PLL1 2U /*!< Parent is PLL1 or PLL0/2 */ +#define SC_PM_PARENT_PLL2 3U /*!< Parent in PLL2 or PLL0/4 */ +#define SC_PM_PARENT_BYPS 4U /*!< Parent is a bypass clock. */ + +/* Defines for sc_pm_reset_type_t */ +#define SC_PM_RESET_TYPE_COLD 0U /* Cold reset */ +#define SC_PM_RESET_TYPE_WARM 1U /* Warm reset */ +#define SC_PM_RESET_TYPE_BOARD 2U /* Board reset */ + +/* Defines for sc_pm_reset_reason_t */ +#define SC_PM_RESET_REASON_POR 0U /* Power on reset */ +#define SC_PM_RESET_REASON_JTAG 1U /* JTAG reset */ +#define SC_PM_RESET_REASON_SW 2U /* Software reset */ +#define SC_PM_RESET_REASON_WDOG 3U /* Partition watchdog reset */ +#define SC_PM_RESET_REASON_LOCKUP 4U /* SCU lockup reset */ +#define SC_PM_RESET_REASON_SNVS 5U /* SNVS reset */ +#define SC_PM_RESET_REASON_TEMP 6U /* Temp panic reset */ +#define SC_PM_RESET_REASON_MSI 7U /* MSI reset */ +#define SC_PM_RESET_REASON_UECC 8U /* ECC reset */ +#define SC_PM_RESET_REASON_SCFW_WDOG 9U /* SCFW watchdog reset */ +#define SC_PM_RESET_REASON_ROM_WDOG 10U /* SCU ROM watchdog reset */ +#define SC_PM_RESET_REASON_SECO 11U /* SECO reset */ +#define SC_PM_RESET_REASON_SCFW_FAULT 12U /* SCFW fault reset */ + +/* Defines for sc_pm_sys_if_t */ +#define SC_PM_SYS_IF_INTERCONNECT 0U /* System interconnect */ +#define SC_PM_SYS_IF_MU 1U /* AP -> SCU message units */ +#define SC_PM_SYS_IF_OCMEM 2U /* On-chip memory (ROM/OCRAM) */ +#define SC_PM_SYS_IF_DDR 3U /* DDR memory */ + +/* Defines for sc_pm_wake_src_t */ +/* No wake source, used for self-kill */ +#define SC_PM_WAKE_SRC_NONE 0U +/* Wakeup from SCU to resume CPU (IRQSTEER & GIC powered down) */ +#define SC_PM_WAKE_SRC_SCU 1U +/* Wakeup from IRQSTEER to resume CPU (GIC powered down) */ +#define SC_PM_WAKE_SRC_IRQSTEER 2U +/* Wakeup from IRQSTEER+GIC to wake CPU (GIC clock gated) */ +#define SC_PM_WAKE_SRC_IRQSTEER_GIC 3U +/* Wakeup from GIC to wake CPU */ +#define SC_PM_WAKE_SRC_GIC 4U +/* Types */ + +/* + * This type is used to declare a power mode. Note resources only use + * SC_PM_PW_MODE_OFF and SC_PM_PW_MODE_ON. The other modes are used only + * as system power modes. + */ typedef u8 sc_pm_power_mode_t; + +/* + * This type is used to declare a clock. + */ typedef u8 sc_pm_clk_t; + +/* + * This type is used to declare a clock mode. + */ typedef u8 sc_pm_clk_mode_t; + +/* + * This type is used to declare the clock parent. + */ typedef u8 sc_pm_clk_parent_t; + +/* + * This type is used to declare clock rates. + */ typedef u32 sc_pm_clock_rate_t; +/* + * This type is used to declare a desired reset type. + */ +typedef u8 sc_pm_reset_type_t; + +/* + * This type is used to declare a reason for a reset. + */ +typedef u8 sc_pm_reset_reason_t; + +/* + * This type is used to specify a system-level interface to be power managed. + */ +typedef u8 sc_pm_sys_if_t; + +/* + * This type is used to specify a wake source for CPU resources. + */ +typedef u8 sc_pm_wake_src_t; #endif /* SC_PM_API_H */ diff --git a/include/firmware/imx/sci/svc/rm/api.h b/include/firmware/imx/sci/svc/rm/api.h index 163d814..f4e9abc 100644 --- a/include/firmware/imx/sci/svc/rm/api.h +++ b/include/firmware/imx/sci/svc/rm/api.h @@ -38,32 +38,36 @@ /* Types */ -/*! +/* * This type is used to declare a resource partition. */ typedef u8 sc_rm_pt_t; -/*! +/* * This type is used to declare a memory region. */ typedef u8 sc_rm_mr_t; -/*! +/* * This type is used to declare a resource domain ID used by the * isolation HW. */ typedef u8 sc_rm_did_t; -/*! +/* * This type is used to declare an SMMU StreamID. */ typedef u16 sc_rm_sid_t; -/*! +/* * This type is a used to declare master transaction attributes. */ typedef u8 sc_rm_spa_t; +/* + * This type is used to declare a resource/memory region access permission. + * Refer to the XRDC2 Block Guide for more information. + */ typedef u8 sc_rm_perm_t; #endif /* SC_RM_API_H */ diff --git a/include/firmware/imx/sci/svc/seco/api.h b/include/firmware/imx/sci/svc/seco/api.h index 6e9c302..7d4b6b9 100644 --- a/include/firmware/imx/sci/svc/seco/api.h +++ b/include/firmware/imx/sci/svc/seco/api.h @@ -17,6 +17,7 @@ #define SC_SECO_AUTH_SECO_FW 3U /* SECO Firmware */ #define SC_SECO_AUTH_HDMI_TX_FW 4U /* HDMI TX Firmware */ #define SC_SECO_AUTH_HDMI_RX_FW 5U /* HDMI RX Firmware */ +#define SC_SECO_EVERIFY_IMAGE 6U /* Enhanced verify image */ #define SC_SECO_RNG_STAT_UNAVAILABLE 0U /* Unable to initialize the RNG */ #define SC_SECO_RNG_STAT_INPROGRESS 1U /* Initialization is on-going */ @@ -24,12 +25,12 @@ /* Types */ -/*! +/* * This type is used to issue SECO authenticate commands. */ typedef u8 sc_seco_auth_cmd_t; -/*! +/* * This type is used to return the RNG initialization status. */ typedef u32 sc_seco_rng_stat_t; diff --git a/include/firmware/imx/sci/svc/timer/api.h b/include/firmware/imx/sci/svc/timer/api.h new file mode 100644 index 0000000..c2fe34a --- /dev/null +++ b/include/firmware/imx/sci/svc/timer/api.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018-2019 NXP + */ + +#ifndef SC_TIMER_API_H +#define SC_TIMER_API_H + +/* Defines */ + +/* Defines for type widths */ +#define SC_TIMER_ACTION_W 3U /* Width of sc_timer_wdog_action_t */ + +/* Defines for sc_timer_wdog_action_t */ +#define SC_TIMER_WDOG_ACTION_PARTITION 0U /* Reset partition */ +#define SC_TIMER_WDOG_ACTION_WARM 1U /* Warm reset system */ +#define SC_TIMER_WDOG_ACTION_COLD 2U /* Cold reset system */ +#define SC_TIMER_WDOG_ACTION_BOARD 3U /* Reset board */ +#define SC_TIMER_WDOG_ACTION_IRQ 4U /* Only generate IRQs */ + +/* Types */ + +/* + * This type is used to configure the watchdog action. + */ +typedef u8 sc_timer_wdog_action_t; + +/* + * This type is used to declare a watchdog time value in milliseconds. + */ +typedef u32 sc_timer_wdog_time_t; + +#endif /* SC_TIMER_API_H */ |