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authorManorit Chawdhry <m-chawdhry@ti.com>2024-03-26 13:37:06 +0530
committerTom Rini <trini@konsulko.com>2024-04-11 15:51:11 -0600
commitfbfd2baf975f4a0d6345e4d0ed6094c549fe1d03 (patch)
tree9eae35fc300e015f7dffaa8046aee5d5eb167791 /tools
parent5ed961094d456d03c481d2bf751f6eeb06c1bada (diff)
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binman: ti-secure: Enable debug extension for combined boot
To debug using jtag, ROM needs to unlock jtag debugging on HS devices and it does that looking at this debug extension. Add the debug extension and enable it by default. Link: https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/security/sec_cert_format.html?highlight=debug#sysfw-debug-ext Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Diffstat (limited to 'tools')
-rw-r--r--tools/binman/btool/openssl.py7
1 files changed, 7 insertions, 0 deletions
diff --git a/tools/binman/btool/openssl.py b/tools/binman/btool/openssl.py
index fe81a1f..c6df64c 100644
--- a/tools/binman/btool/openssl.py
+++ b/tools/binman/btool/openssl.py
@@ -283,6 +283,7 @@ emailAddress = {req_dist_name_dict['emailAddress']}
basicConstraints = CA:true
1.3.6.1.4.1.294.1.3=ASN1:SEQUENCE:swrv
1.3.6.1.4.1.294.1.9=ASN1:SEQUENCE:ext_boot_info
+1.3.6.1.4.1.294.1.8=ASN1:SEQUENCE:debug
[swrv]
swrv=INTEGER:{sw_rev}
@@ -323,6 +324,12 @@ compSize = INTEGER:{imagesize_sysfw_data}
shaType = OID:{sha_type}
shaValue = FORMAT:HEX,OCT:{hashval_sysfw_data}
+[ debug ]
+debugUID = FORMAT:HEX,OCT:0000000000000000000000000000000000000000000000000000000000000000
+debugType = INTEGER:4
+coreDbgEn = INTEGER:0
+coreDbgSecEn = INTEGER:0
+
{sysfw_inner_cert_ext_boot_block}
{dm_data_ext_boot_block}