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| author | Biwen Li <biwen.li@nxp.com> | 2020-05-01 20:04:17 +0800 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-05-04 09:12:36 +0530 |
| commit | e6bd72f880a76652ce1d6742880e7efcd85b8fb1 (patch) | |
| tree | 3d3b33bb623023c5b955ec806a9d97a324659523 /include | |
| parent | 1321aef8cd13d89d36e8cda8482b87fcea93994a (diff) | |
| download | u-boot-e6bd72f880a76652ce1d6742880e7efcd85b8fb1.zip u-boot-e6bd72f880a76652ce1d6742880e7efcd85b8fb1.tar.gz u-boot-e6bd72f880a76652ce1d6742880e7efcd85b8fb1.tar.bz2 | |
dm: ppc: T4240: add i2c DM support
This supports i2c DM for SoC T4240
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/T4240QDS.h | 13 | ||||
| -rw-r--r-- | include/configs/T4240RDB.h | 9 |
2 files changed, 21 insertions, 1 deletions
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 91a7c70..5f91a52 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -280,6 +280,19 @@ unsigned long get_board_ddr_clk(void); #endif /* I2C */ +#ifndef CONFIG_DM_I2C +#define CONFIG_SYS_I2C +#else +#undef CONFIG_SYS_I2C +#undef CONFIG_SYS_FSL_I2C2_OFFSET +#undef CONFIG_SYS_FSL_I2C2_SLAVE +#undef CONFIG_SYS_FSL_I2C2_SPEED +#undef CONFIG_SYS_FSL_I2C_SLAVE +#undef CONFIG_SYS_FSL_I2C_SPEED +#undef CONFIG_SYS_FSL_I2C_OFFSET +#endif + +#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 100000 /* I2C speed */ #define CONFIG_SYS_FSL_I2C2_SPEED 100000 /* I2C2 speed */ #define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 31cb1cf..ce7634f 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ /* @@ -159,12 +160,18 @@ #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) /* I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif + +#define CONFIG_SYS_I2C_FSL /* * General PCI |