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| author | Lokesh Vutla <lokeshvutla@ti.com> | 2016-05-16 11:47:26 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-05-27 15:47:52 -0400 |
| commit | 97f3a178b2a3d5a7767cb6cb15ba9c40ba804ebb (patch) | |
| tree | 006195ca5c4c6e7ec9f52d7a2426e07bcc1aa053 /include | |
| parent | 3164f3c68941a1665090bca903d56754ac36f89d (diff) | |
| download | u-boot-97f3a178b2a3d5a7767cb6cb15ba9c40ba804ebb.zip u-boot-97f3a178b2a3d5a7767cb6cb15ba9c40ba804ebb.tar.gz u-boot-97f3a178b2a3d5a7767cb6cb15ba9c40ba804ebb.tar.bz2 | |
board: AM335x-ICEv2: Add cpsw support
In order to enable cpsw on AM335x ICEv2 board, the following needs to be done:
1)There are few on board jumper settings which gives a choice between
cpsw and PRUSS, that needs to be properly selected[1]. Even after selecting
this, there are few GPIOs which control these muxes that needs to be held high.
2) The clock to PHY is provided by a PLL-based clock synthesizer[2] connected
via I2C. This needs to properly programmed and locked for PHY operation.
And PHY needs to be reset before before being used, which is also held by
a GPIO.
3) RMII mode needs to be selected.
[1] http://www.ti.com/lit/zip/tidr336
[2] http://www.ti.com/lit/ds/symlink/cdce913.pdf
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/am335x_evm.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index dfd00de..7c7f197 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -475,4 +475,9 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE #endif /* NOR support */ +#ifdef CONFIG_DRIVER_TI_CPSW +#define CONFIG_CLOCK_SYNTHESIZER +#define CLK_SYNTHESIZER_I2C_ADDR 0x65 +#endif + #endif /* ! __CONFIG_AM335X_EVM_H */ |