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| author | Patrice Chotard <patrice.chotard@st.com> | 2017-11-15 13:14:52 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-11-29 22:30:50 -0500 |
| commit | 4e97e25723530cc8bf57ca1d0ae17d86895e04c5 (patch) | |
| tree | 776fe7bae3a58cde68b6b024427436d41c22dfa1 /include/stm32_rcc.h | |
| parent | 928954fe58e69767b138816ab58e1a7e48f2c685 (diff) | |
| download | u-boot-4e97e25723530cc8bf57ca1d0ae17d86895e04c5.zip u-boot-4e97e25723530cc8bf57ca1d0ae17d86895e04c5.tar.gz u-boot-4e97e25723530cc8bf57ca1d0ae17d86895e04c5.tar.bz2 | |
clk: clk_stm32fx: add clock configuration for mmc usage
MMC block needs 48Mhz source clock, for that we choose
to select the SAI PLL.
Update also stm32_clock_get_rate() to retrieve the MMC
clock source needed in MMC driver.
STM32F4 uses a different RCC variant than STM32F7. For STM32F4
sdmmc clocks bit are located into dckcfgr register whereas there
are located into dckcfgr2 registers on STM32F7.
In both registers, bits CK48MSEL and SDMMC1SEL are located at
the same position.
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Diffstat (limited to 'include/stm32_rcc.h')
| -rw-r--r-- | include/stm32_rcc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/stm32_rcc.h b/include/stm32_rcc.h index 6dfb9cc..fb08552 100644 --- a/include/stm32_rcc.h +++ b/include/stm32_rcc.h @@ -37,6 +37,7 @@ struct pll_psc { struct stm32_clk_info { struct pll_psc sys_pll_psc; bool has_overdrive; + bool v2; }; enum soc_family { |