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| author | Simon Glass <sjg@chromium.org> | 2020-11-04 09:57:15 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2020-11-05 14:58:45 +0800 |
| commit | 6571d873159789ee7caa571eafa5fa641005971c (patch) | |
| tree | bcb0f59b372597fae7916946cd6be44424a435bf /include/pci_tegra.h | |
| parent | 1779b8a96a32706dc8e2e71187889b38d9822443 (diff) | |
| download | u-boot-6571d873159789ee7caa571eafa5fa641005971c.zip u-boot-6571d873159789ee7caa571eafa5fa641005971c.tar.gz u-boot-6571d873159789ee7caa571eafa5fa641005971c.tar.bz2 | |
x86: apl: Add core init for the SoC
Set up MSRs required for Apollo Lake. This enables Linux to use the
timers correctly. Also write the fixed MSRs for this platform.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'include/pci_tegra.h')
0 files changed, 0 insertions, 0 deletions