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| author | Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> | 2023-08-02 08:35:05 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2023-09-21 13:20:10 +0200 |
| commit | b58ced5277edaa5213e4745cab829219f9a8a9c6 (patch) | |
| tree | 253c56c2734f0134dc60c7389a6fbdbeaae78051 /include/configs | |
| parent | 7ca9c1d864b7b3adffdd1e889f174feb51a1b5b1 (diff) | |
| download | u-boot-b58ced5277edaa5213e4745cab829219f9a8a9c6.zip u-boot-b58ced5277edaa5213e4745cab829219f9a8a9c6.tar.gz u-boot-b58ced5277edaa5213e4745cab829219f9a8a9c6.tar.bz2 | |
arm64: versal: Increase the number of DRAM banks to 36
HBM stands for high bandwidth memory and is a type of memory interface used
in 3D-stacked DRAM (dynamic random access memory) in some AMD GPUs (aka
graphics cards), as well as the server, high-performance computing (HPC)
and networking and client space. High Bandwidth Memory(HBM) has total 16
channels, one channel is divided into two pseudo channels which makes its
32 banks each with some amount of memory.
And then we have DDR_LOW PS low, DDR_HIGH0 PS high, DDR_HIGH1 PS very high
and pretty much there should be also place for PL DDR. So maximum number of
memory banks will be 36, updating the CONFIG_NR_DRAM_BANKS to 36.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ed9eaf5c20501ee691d7d28a173511cd9a87f161.1690958095.git.michal.simek@amd.com
Diffstat (limited to 'include/configs')
0 files changed, 0 insertions, 0 deletions