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| author | Stefan Roese <sr@denx.de> | 2015-11-25 07:37:00 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2016-01-14 14:08:59 +0100 |
| commit | 6451223a8d1dc57cf0edc7f41799ec79468959c8 (patch) | |
| tree | 6306c2811e990823363a157f960127d495ea84ac /include/configs/db-mv784mp-gp.h | |
| parent | cdf1d240badefc787ef0dc440b9ea6554b97416b (diff) | |
| download | u-boot-6451223a8d1dc57cf0edc7f41799ec79468959c8.zip u-boot-6451223a8d1dc57cf0edc7f41799ec79468959c8.tar.gz u-boot-6451223a8d1dc57cf0edc7f41799ec79468959c8.tar.bz2 | |
arm: mvebu: Add DM and OF_CONTROL support to SPL
This patch adds full DM support to the SPL on MVEBU. Currently
only serial is supported. Other drivers will follow.
This patch also adds the necessary config values for the DEBUG UART
to the MVEBU defconfig files. This came in handy while implementing
this DM support.
Additionally, the mvebu specific SPL linker script is removed and
this common one is used instead:
arch/arm/cpu/u-boot-spl.lds
This common linker script already handles all special cases. No need
to reinvent the wheel for MVEBU here.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/configs/db-mv784mp-gp.h')
| -rw-r--r-- | include/configs/db-mv784mp-gp.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index ab6e5a5..d0f9f89 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -101,11 +101,13 @@ #endif /* CONFIG_CMD_IDE */ /* PCIe support */ +#ifndef CONFIG_SPL_BUILD #define CONFIG_PCI #define CONFIG_PCI_MVEBU #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_E1000 /* enable Intel E1000 support for testing */ +#endif /* NAND */ #define CONFIG_SYS_NAND_USE_FLASH_BBT @@ -139,9 +141,9 @@ #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ - CONFIG_SPL_BSS_MAX_SIZE) -#define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10) +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MALLOC_SIMPLE +#endif #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) |