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| author | Tom Rini <trini@konsulko.com> | 2022-12-02 16:42:35 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-12-22 10:31:48 -0500 |
| commit | 829e9d223657f5779668bb7a46e902a85e09b664 (patch) | |
| tree | 1eb0a7342b37799fb8134c0c3a463dca76b951f7 /include/configs/T104xRDB.h | |
| parent | 2cc61a631bb8ae1acfadac9840abaa803091b7ac (diff) | |
| download | u-boot-829e9d223657f5779668bb7a46e902a85e09b664.zip u-boot-829e9d223657f5779668bb7a46e902a85e09b664.tar.gz u-boot-829e9d223657f5779668bb7a46e902a85e09b664.tar.bz2 | |
ddr: fsl: Remove CONFIG_MEM_INIT_VALUE
The way all of the memory init code here works is that we pass
0xDEADBEEF around for the initial value (as it's a well known 'poison'
value and so easily recognized in debuggers, etc). The only point of
this CONFIG symbol was to pass in a different value for that purpose.
Drop this symbol and cleanup the code slightly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs/T104xRDB.h')
| -rw-r--r-- | include/configs/T104xRDB.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index dfad76e..5bdc210 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -64,9 +64,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif /* * Config the L3 Cache as L3 SRAM |