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| author | Tom Rini <trini@konsulko.com> | 2022-12-02 16:42:51 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-12-22 10:31:49 -0500 |
| commit | 8214b772cf213f1f02e5e33f4a5158f52d9d2c23 (patch) | |
| tree | 3da0b0377b27eedd5d702c77fbb63a0d905a3f77 /include/configs/T104xRDB.h | |
| parent | 46df77669ec4d8f04b0faf770d661f79971775a6 (diff) | |
| download | u-boot-8214b772cf213f1f02e5e33f4a5158f52d9d2c23.zip u-boot-8214b772cf213f1f02e5e33f4a5158f52d9d2c23.tar.gz u-boot-8214b772cf213f1f02e5e33f4a5158f52d9d2c23.tar.bz2 | |
T104xRDB: Remove non-TARGET_T1042D4RDB variants
At this point only the TARGET_T1042D4RDB variant of this is supported in
tree, so remove the remaining parts of the other platforms.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs/T104xRDB.h')
| -rw-r--r-- | include/configs/T104xRDB.h | 52 |
1 files changed, 4 insertions, 48 deletions
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 7a5bf93..cfde8ec 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -127,24 +127,10 @@ #define CPLD_LBMAP_RESET 0xFF #define CPLD_LBMAP_SHIFT 0x03 -#if defined(CONFIG_TARGET_T1042RDB_PI) -#define CPLD_DIU_SEL_DFP 0x80 -#elif defined(CONFIG_TARGET_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042D4RDB) #define CPLD_DIU_SEL_DFP 0xc0 #endif -#if defined(CONFIG_TARGET_T1040D4RDB) -#define CPLD_INT_MASK_ALL 0xFF -#define CPLD_INT_MASK_THERM 0x80 -#define CPLD_INT_MASK_DVI_DFP 0x40 -#define CPLD_INT_MASK_QSGMII1 0x20 -#define CPLD_INT_MASK_QSGMII2 0x10 -#define CPLD_INT_MASK_SGMI1 0x08 -#define CPLD_INT_MASK_SGMI2 0x04 -#define CPLD_INT_MASK_TDMR1 0x02 -#define CPLD_INT_MASK_TDMR2 0x01 -#endif - #define CFG_SYS_CPLD_BASE 0xffdf0000 #define CFG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CFG_SYS_CPLD_BASE) #define CFG_SYS_CSPR2_EXT (0xf) @@ -266,9 +252,7 @@ #define I2C_MUX_PCA_ADDR 0x70 #define I2C_MUX_CH_DEFAULT 0x8 -#if defined(CONFIG_TARGET_T1042RDB_PI) || \ - defined(CONFIG_TARGET_T1040D4RDB) || \ - defined(CONFIG_TARGET_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042D4RDB) /* * RTC configuration */ @@ -350,36 +334,16 @@ #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_FMAN_ENET -#if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1042RDB) -#define CFG_SYS_SGMII1_PHY_ADDR 0x03 -#elif defined(CONFIG_TARGET_T1040D4RDB) -#define CFG_SYS_SGMII1_PHY_ADDR 0x01 -#elif defined(CONFIG_TARGET_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042D4RDB) #define CFG_SYS_SGMII1_PHY_ADDR 0x02 #define CFG_SYS_SGMII2_PHY_ADDR 0x03 #define CFG_SYS_SGMII3_PHY_ADDR 0x01 #endif -#if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB) -#define CFG_SYS_RGMII1_PHY_ADDR 0x04 -#define CFG_SYS_RGMII2_PHY_ADDR 0x05 -#else #define CFG_SYS_RGMII1_PHY_ADDR 0x01 #define CFG_SYS_RGMII2_PHY_ADDR 0x02 #endif -/* Enable VSC9953 L2 Switch driver on T1040 SoC */ -#if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1040D4RDB) -#ifdef CONFIG_TARGET_T1040RDB -#define CFG_SYS_FM1_QSGMII11_PHY_ADDR 0x04 -#define CFG_SYS_FM1_QSGMII21_PHY_ADDR 0x08 -#else -#define CFG_SYS_FM1_QSGMII11_PHY_ADDR 0x08 -#define CFG_SYS_FM1_QSGMII21_PHY_ADDR 0x0c -#endif -#endif -#endif - /* * Miscellaneous configurable options */ @@ -402,15 +366,7 @@ #define __USB_PHY_TYPE utmi #define RAMDISKFILE "t104xrdb/ramdisk.uboot" -#ifdef CONFIG_TARGET_T1040RDB -#define FDTFILE "t1040rdb/t1040rdb.dtb" -#elif defined(CONFIG_TARGET_T1042RDB_PI) -#define FDTFILE "t1042rdb_pi/t1042rdb_pi.dtb" -#elif defined(CONFIG_TARGET_T1042RDB) -#define FDTFILE "t1042rdb/t1042rdb.dtb" -#elif defined(CONFIG_TARGET_T1040D4RDB) -#define FDTFILE "t1042rdb/t1040d4rdb.dtb" -#elif defined(CONFIG_TARGET_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042D4RDB) #define FDTFILE "t1042rdb/t1042d4rdb.dtb" #endif |