diff options
author | Weijie Gao <weijie.gao@mediatek.com> | 2023-07-19 17:16:37 +0800 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2023-08-03 09:40:50 -0400 |
commit | 7cb50cd477b7a28221614e28400fdfe1ba4e61c2 (patch) | |
tree | 689fe35e6c02f0fb9961b70c9c5e6b307720ea7f /drivers | |
parent | df4c82f014a4f81905c599902572b5451197ca9e (diff) | |
download | u-boot-7cb50cd477b7a28221614e28400fdfe1ba4e61c2.zip u-boot-7cb50cd477b7a28221614e28400fdfe1ba4e61c2.tar.gz u-boot-7cb50cd477b7a28221614e28400fdfe1ba4e61c2.tar.bz2 |
pinctrl: mediatek: convert most definitions to const
There exists a situation of the mediatek pinctrl driver that may return
wrong pin function value for the pinmux driver:
- All pin function arrays are defined without const
- Some pin function arrays contain all-zero value, e.g.:
static int mt7622_spi_funcs[] = { 0, 0, 0, 0, 0, 0, };
- These arrays will be put into .bss section during compilation
- .bss section has no "a" attribute and does not exist in the final binary
file after objcopy.
- FDT binary blob is appended to the u-boot binary, which occupies the
.bss section.
- During board_f stage, .bss has not been initialized, and contains the
data of FDT, which is not full-zero data.
- pinctrl driver is initialized in board_f stage, and it will get wrong
data if another driver is going to set default pinctrl.
Since pinmux information and soc data are only meant to be read-only, thus
should be declared as const. This will force all pinctrl data being put
into .rodata section. Since .rodata has "a" attribute, even the all-zero
data will be allocated and filled with correct value in to u-boot binary.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mt7622.c | 474 | ||||
-rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mt7623.c | 650 | ||||
-rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mt7629.c | 174 | ||||
-rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mt7981.c | 270 | ||||
-rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mt7986.c | 145 | ||||
-rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mt8512.c | 24 | ||||
-rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mt8516.c | 18 | ||||
-rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mt8518.c | 20 | ||||
-rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 4 | ||||
-rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mtk-common.h | 8 |
10 files changed, 898 insertions, 889 deletions
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7622.c b/drivers/pinctrl/mediatek/pinctrl-mt7622.c index bf4e9a2..114f260 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c @@ -233,283 +233,285 @@ static const struct mtk_pin_desc mt7622_pins[] = { */ /* EMMC */ -static int mt7622_emmc_pins[] = { 40, 41, 42, 43, 44, 45, 47, 48, 49, 50, }; -static int mt7622_emmc_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; +static const int mt7622_emmc_pins[] = { + 40, 41, 42, 43, 44, 45, 47, 48, 49, 50, }; +static const int mt7622_emmc_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; -static int mt7622_emmc_rst_pins[] = { 37, }; -static int mt7622_emmc_rst_funcs[] = { 1, }; +static const int mt7622_emmc_rst_pins[] = { 37, }; +static const int mt7622_emmc_rst_funcs[] = { 1, }; /* LED for EPHY */ -static int mt7622_ephy_leds_pins[] = { 86, 91, 92, 93, 94, }; -static int mt7622_ephy_leds_funcs[] = { 0, 0, 0, 0, 0, }; -static int mt7622_ephy0_led_pins[] = { 86, }; -static int mt7622_ephy0_led_funcs[] = { 0, }; -static int mt7622_ephy1_led_pins[] = { 91, }; -static int mt7622_ephy1_led_funcs[] = { 2, }; -static int mt7622_ephy2_led_pins[] = { 92, }; -static int mt7622_ephy2_led_funcs[] = { 2, }; -static int mt7622_ephy3_led_pins[] = { 93, }; -static int mt7622_ephy3_led_funcs[] = { 2, }; -static int mt7622_ephy4_led_pins[] = { 94, }; -static int mt7622_ephy4_led_funcs[] = { 2, }; +static const int mt7622_ephy_leds_pins[] = { 86, 91, 92, 93, 94, }; +static const int mt7622_ephy_leds_funcs[] = { 0, 0, 0, 0, 0, }; +static const int mt7622_ephy0_led_pins[] = { 86, }; +static const int mt7622_ephy0_led_funcs[] = { 0, }; +static const int mt7622_ephy1_led_pins[] = { 91, }; +static const int mt7622_ephy1_led_funcs[] = { 2, }; +static const int mt7622_ephy2_led_pins[] = { 92, }; +static const int mt7622_ephy2_led_funcs[] = { 2, }; +static const int mt7622_ephy3_led_pins[] = { 93, }; +static const int mt7622_ephy3_led_funcs[] = { 2, }; +static const int mt7622_ephy4_led_pins[] = { 94, }; +static const int mt7622_ephy4_led_funcs[] = { 2, }; /* Embedded Switch */ -static int mt7622_esw_pins[] = { 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, - 62, 63, 64, 65, 66, 67, 68, 69, 70, }; -static int mt7622_esw_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, }; -static int mt7622_esw_p0_p1_pins[] = { 51, 52, 53, 54, 55, 56, 57, 58, }; -static int mt7622_esw_p0_p1_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, }; -static int mt7622_esw_p2_p3_p4_pins[] = { 59, 60, 61, 62, 63, 64, 65, 66, 67, - 68, 69, 70, }; -static int mt7622_esw_p2_p3_p4_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, }; +static const int mt7622_esw_pins[] = { + 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, + 69, 70, }; +static const int mt7622_esw_funcs[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; +static const int mt7622_esw_p0_p1_pins[] = { 51, 52, 53, 54, 55, 56, 57, 58, }; +static const int mt7622_esw_p0_p1_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, }; +static const int mt7622_esw_p2_p3_p4_pins[] = { + 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, }; +static const int mt7622_esw_p2_p3_p4_funcs[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; /* RGMII via ESW */ -static int mt7622_rgmii_via_esw_pins[] = { 59, 60, 61, 62, 63, 64, 65, 66, - 67, 68, 69, 70, }; -static int mt7622_rgmii_via_esw_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, }; +static const int mt7622_rgmii_via_esw_pins[] = { + 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, }; +static const int mt7622_rgmii_via_esw_funcs[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; /* RGMII via GMAC1 */ -static int mt7622_rgmii_via_gmac1_pins[] = { 59, 60, 61, 62, 63, 64, 65, 66, - 67, 68, 69, 70, }; -static int mt7622_rgmii_via_gmac1_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, }; +static const int mt7622_rgmii_via_gmac1_pins[] = { + 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, }; +static const int mt7622_rgmii_via_gmac1_funcs[] = { + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; /* RGMII via GMAC2 */ -static int mt7622_rgmii_via_gmac2_pins[] = { 25, 26, 27, 28, 29, 30, 31, 32, - 33, 34, 35, 36, }; -static int mt7622_rgmii_via_gmac2_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, }; +static const int mt7622_rgmii_via_gmac2_pins[] = { + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, }; +static const int mt7622_rgmii_via_gmac2_funcs[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; /* I2C */ -static int mt7622_i2c0_pins[] = { 14, 15, }; -static int mt7622_i2c0_funcs[] = { 0, 0, }; -static int mt7622_i2c1_0_pins[] = { 55, 56, }; -static int mt7622_i2c1_0_funcs[] = { 0, 0, }; -static int mt7622_i2c1_1_pins[] = { 73, 74, }; -static int mt7622_i2c1_1_funcs[] = { 3, 3, }; -static int mt7622_i2c1_2_pins[] = { 87, 88, }; -static int mt7622_i2c1_2_funcs[] = { 0, 0, }; -static int mt7622_i2c2_0_pins[] = { 57, 58, }; -static int mt7622_i2c2_0_funcs[] = { 0, 0, }; -static int mt7622_i2c2_1_pins[] = { 75, 76, }; -static int mt7622_i2c2_1_funcs[] = { 3, 3, }; -static int mt7622_i2c2_2_pins[] = { 89, 90, }; -static int mt7622_i2c2_2_funcs[] = { 0, 0, }; +static const int mt7622_i2c0_pins[] = { 14, 15, }; +static const int mt7622_i2c0_funcs[] = { 0, 0, }; +static const int mt7622_i2c1_0_pins[] = { 55, 56, }; +static const int mt7622_i2c1_0_funcs[] = { 0, 0, }; +static const int mt7622_i2c1_1_pins[] = { 73, 74, }; +static const int mt7622_i2c1_1_funcs[] = { 3, 3, }; +static const int mt7622_i2c1_2_pins[] = { 87, 88, }; +static const int mt7622_i2c1_2_funcs[] = { 0, 0, }; +static const int mt7622_i2c2_0_pins[] = { 57, 58, }; +static const int mt7622_i2c2_0_funcs[] = { 0, 0, }; +static const int mt7622_i2c2_1_pins[] = { 75, 76, }; +static const int mt7622_i2c2_1_funcs[] = { 3, 3, }; +static const int mt7622_i2c2_2_pins[] = { 89, 90, }; +static const int mt7622_i2c2_2_funcs[] = { 0, 0, }; /* I2S */ -static int mt7622_i2s_in_mclk_bclk_ws_pins[] = { 3, 4, 5, }; -static int mt7622_i2s_in_mclk_bclk_ws_funcs[] = { 3, 3, 0, }; -static int mt7622_i2s1_in_data_pins[] = { 1, }; -static int mt7622_i2s1_in_data_funcs[] = { 0, }; -static int mt7622_i2s2_in_data_pins[] = { 16, }; -static int mt7622_i2s2_in_data_funcs[] = { 0, }; -static int mt7622_i2s3_in_data_pins[] = { 17, }; -static int mt7622_i2s3_in_data_funcs[] = { 0, }; -static int mt7622_i2s4_in_data_pins[] = { 18, }; -static int mt7622_i2s4_in_data_funcs[] = { 0, }; -static int mt7622_i2s_out_mclk_bclk_ws_pins[] = { 3, 4, 5, }; -static int mt7622_i2s_out_mclk_bclk_ws_funcs[] = { 0, 0, 0, }; -static int mt7622_i2s1_out_data_pins[] = { 2, }; -static int mt7622_i2s1_out_data_funcs[] = { 0, }; -static int mt7622_i2s2_out_data_pins[] = { 19, }; -static int mt7622_i2s2_out_data_funcs[] = { 0, }; -static int mt7622_i2s3_out_data_pins[] = { 20, }; -static int mt7622_i2s3_out_data_funcs[] = { 0, }; -static int mt7622_i2s4_out_data_pins[] = { 21, }; -static int mt7622_i2s4_out_data_funcs[] = { 0, }; +static const int mt7622_i2s_in_mclk_bclk_ws_pins[] = { 3, 4, 5, }; +static const int mt7622_i2s_in_mclk_bclk_ws_funcs[] = { 3, 3, 0, }; +static const int mt7622_i2s1_in_data_pins[] = { 1, }; +static const int mt7622_i2s1_in_data_funcs[] = { 0, }; +static const int mt7622_i2s2_in_data_pins[] = { 16, }; +static const int mt7622_i2s2_in_data_funcs[] = { 0, }; +static const int mt7622_i2s3_in_data_pins[] = { 17, }; +static const int mt7622_i2s3_in_data_funcs[] = { 0, }; +static const int mt7622_i2s4_in_data_pins[] = { 18, }; +static const int mt7622_i2s4_in_data_funcs[] = { 0, }; +static const int mt7622_i2s_out_mclk_bclk_ws_pins[] = { 3, 4, 5, }; +static const int mt7622_i2s_out_mclk_bclk_ws_funcs[] = { 0, 0, 0, }; +static const int mt7622_i2s1_out_data_pins[] = { 2, }; +static const int mt7622_i2s1_out_data_funcs[] = { 0, }; +static const int mt7622_i2s2_out_data_pins[] = { 19, }; +static const int mt7622_i2s2_out_data_funcs[] = { 0, }; +static const int mt7622_i2s3_out_data_pins[] = { 20, }; +static const int mt7622_i2s3_out_data_funcs[] = { 0, }; +static const int mt7622_i2s4_out_data_pins[] = { 21, }; +static const int mt7622_i2s4_out_data_funcs[] = { 0, }; /* IR */ -static int mt7622_ir_0_tx_pins[] = { 16, }; -static int mt7622_ir_0_tx_funcs[] = { 4, }; -static int mt7622_ir_1_tx_pins[] = { 59, }; -static int mt7622_ir_1_tx_funcs[] = { 5, }; -static int mt7622_ir_2_tx_pins[] = { 99, }; -static int mt7622_ir_2_tx_funcs[] = { 3, }; -static int mt7622_ir_0_rx_pins[] = { 17, }; -static int mt7622_ir_0_rx_funcs[] = { 4, }; -static int mt7622_ir_1_rx_pins[] = { 60, }; -static int mt7622_ir_1_rx_funcs[] = { 5, }; -static int mt7622_ir_2_rx_pins[] = { 100, }; -static int mt7622_ir_2_rx_funcs[] = { 3, }; +static const int mt7622_ir_0_tx_pins[] = { 16, }; +static const int mt7622_ir_0_tx_funcs[] = { 4, }; +static const int mt7622_ir_1_tx_pins[] = { 59, }; +static const int mt7622_ir_1_tx_funcs[] = { 5, }; +static const int mt7622_ir_2_tx_pins[] = { 99, }; +static const int mt7622_ir_2_tx_funcs[] = { 3, }; +static const int mt7622_ir_0_rx_pins[] = { 17, }; +static const int mt7622_ir_0_rx_funcs[] = { 4, }; +static const int mt7622_ir_1_rx_pins[] = { 60, }; +static const int mt7622_ir_1_rx_funcs[] = { 5, }; +static const int mt7622_ir_2_rx_pins[] = { 100, }; +static const int mt7622_ir_2_rx_funcs[] = { 3, }; /* MDIO */ -static int mt7622_mdc_mdio_pins[] = { 23, 24, }; -static int mt7622_mdc_mdio_funcs[] = { 0, 0, }; +static const int mt7622_mdc_mdio_pins[] = { 23, 24, }; +static const int mt7622_mdc_mdio_funcs[] = { 0, 0, }; /* PCIE */ -static int mt7622_pcie0_0_waken_pins[] = { 14, }; -static int mt7622_pcie0_0_waken_funcs[] = { 2, }; -static int mt7622_pcie0_0_clkreq_pins[] = { 15, }; -static int mt7622_pcie0_0_clkreq_funcs[] = { 2, }; -static int mt7622_pcie0_1_waken_pins[] = { 79, }; -static int mt7622_pcie0_1_waken_funcs[] = { 4, }; -static int mt7622_pcie0_1_clkreq_pins[] = { 80, }; -static int mt7622_pcie0_1_clkreq_funcs[] = { 4, }; -static int mt7622_pcie1_0_waken_pins[] = { 14, }; -static int mt7622_pcie1_0_waken_funcs[] = { 3, }; -static int mt7622_pcie1_0_clkreq_pins[] = { 15, }; -static int mt7622_pcie1_0_clkreq_funcs[] = { 3, }; - -static int mt7622_pcie0_pad_perst_pins[] = { 83, }; -static int mt7622_pcie0_pad_perst_funcs[] = { 0, }; -static int mt7622_pcie1_pad_perst_pins[] = { 84, }; -static int mt7622_pcie1_pad_perst_funcs[] = { 0, }; +static const int mt7622_pcie0_0_waken_pins[] = { 14, }; +static const int mt7622_pcie0_0_waken_funcs[] = { 2, }; +static const int mt7622_pcie0_0_clkreq_pins[] = { 15, }; +static const int mt7622_pcie0_0_clkreq_funcs[] = { 2, }; +static const int mt7622_pcie0_1_waken_pins[] = { 79, }; +static const int mt7622_pcie0_1_waken_funcs[] = { 4, }; +static const int mt7622_pcie0_1_clkreq_pins[] = { 80, }; +static const int mt7622_pcie0_1_clkreq_funcs[] = { 4, }; +static const int mt7622_pcie1_0_waken_pins[] = { 14, }; +static const int mt7622_pcie1_0_waken_funcs[] = { 3, }; +static const int mt7622_pcie1_0_clkreq_pins[] = { 15, }; +static const int mt7622_pcie1_0_clkreq_funcs[] = { 3, }; + +static const int mt7622_pcie0_pad_perst_pins[] = { 83, }; +static const int mt7622_pcie0_pad_perst_funcs[] = { 0, }; +static const int mt7622_pcie1_pad_perst_pins[] = { 84, }; +static const int mt7622_pcie1_pad_perst_funcs[] = { 0, }; /* PMIC bus */ -static int mt7622_pmic_bus_pins[] = { 71, 72, }; -static int mt7622_pmic_bus_funcs[] = { 0, 0, }; +static const int mt7622_pmic_bus_pins[] = { 71, 72, }; +static const int mt7622_pmic_bus_funcs[] = { 0, 0, }; /* Parallel NAND */ -static int mt7622_pnand_pins[] = { 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, - 48, 49, 50, }; -static int mt7622_pnand_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, }; +static const int mt7622_pnand_pins[] = { + 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, }; +static const int mt7622_pnand_funcs[] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; /* PWM */ -static int mt7622_pwm_ch1_0_pins[] = { 51, }; -static int mt7622_pwm_ch1_0_funcs[] = { 3, }; -static int mt7622_pwm_ch1_1_pins[] = { 73, }; -static int mt7622_pwm_ch1_1_funcs[] = { 4, }; -static int mt7622_pwm_ch1_2_pins[] = { 95, }; -static int mt7622_pwm_ch1_2_funcs[] = { 0, }; -static int mt7622_pwm_ch2_0_pins[] = { 52, }; -static int mt7622_pwm_ch2_0_funcs[] = { 3, }; -static int mt7622_pwm_ch2_1_pins[] = { 74, }; -static int mt7622_pwm_ch2_1_funcs[] = { 4, }; -static int mt7622_pwm_ch2_2_pins[] = { 96, }; -static int mt7622_pwm_ch2_2_funcs[] = { 0, }; -static int mt7622_pwm_ch3_0_pins[] = { 53, }; -static int mt7622_pwm_ch3_0_funcs[] = { 3, }; -static int mt7622_pwm_ch3_1_pins[] = { 75, }; -static int mt7622_pwm_ch3_1_funcs[] = { 4, }; -static int mt7622_pwm_ch3_2_pins[] = { 97, }; -static int mt7622_pwm_ch3_2_funcs[] = { 0, }; -static int mt7622_pwm_ch4_0_pins[] = { 54, }; -static int mt7622_pwm_ch4_0_funcs[] = { 3, }; -static int mt7622_pwm_ch4_1_pins[] = { 67, }; -static int mt7622_pwm_ch4_1_funcs[] = { 3, }; -static int mt7622_pwm_ch4_2_pins[] = { 76, }; -static int mt7622_pwm_ch4_2_funcs[] = { 4, }; -static int mt7622_pwm_ch4_3_pins[] = { 98, }; -static int mt7622_pwm_ch4_3_funcs[] = { 0, }; -static int mt7622_pwm_ch5_0_pins[] = { 68, }; -static int mt7622_pwm_ch5_0_funcs[] = { 3, }; -static int mt7622_pwm_ch5_1_pins[] = { 77, }; -static int mt7622_pwm_ch5_1_funcs[] = { 4, }; -static int mt7622_pwm_ch5_2_pins[] = { 99, }; -static int mt7622_pwm_ch5_2_funcs[] = { 0, }; -static int mt7622_pwm_ch6_0_pins[] = { 69, }; -static int mt7622_pwm_ch6_0_funcs[] = { 3, }; -static int mt7622_pwm_ch6_1_pins[] = { 78, }; -static int mt7622_pwm_ch6_1_funcs[] = { 4, }; -static int mt7622_pwm_ch6_2_pins[] = { 81, }; -static int mt7622_pwm_ch6_2_funcs[] = { 4, }; -static int mt7622_pwm_ch6_3_pins[] = { 100, }; -static int mt7622_pwm_ch6_3_funcs[] = { 0, }; -static int mt7622_pwm_ch7_0_pins[] = { 70, }; -static int mt7622_pwm_ch7_0_funcs[] = { 3, }; -static int mt7622_pwm_ch7_1_pins[] = { 82, }; -static int mt7622_pwm_ch7_1_funcs[] = { 4, }; -static int mt7622_pwm_ch7_2_pins[] = { 101, }; -static int mt7622_pwm_ch7_2_funcs[] = { 0, }; +static const int mt7622_pwm_ch1_0_pins[] = { 51, }; +static const int mt7622_pwm_ch1_0_funcs[] = { 3, }; +static const int mt7622_pwm_ch1_1_pins[] = { 73, }; +static const int mt7622_pwm_ch1_1_funcs[] = { 4, }; +static const int mt7622_pwm_ch1_2_pins[] = { 95, }; +static const int mt7622_pwm_ch1_2_funcs[] = { 0, }; +static const int mt7622_pwm_ch2_0_pins[] = { 52, }; +static const int mt7622_pwm_ch2_0_funcs[] = { 3, }; +static const int mt7622_pwm_ch2_1_pins[] = { 74, }; +static const int mt7622_pwm_ch2_1_funcs[] = { 4, }; +static const int mt7622_pwm_ch2_2_pins[] = { 96, }; +static const int mt7622_pwm_ch2_2_funcs[] = { 0, }; +static const int mt7622_pwm_ch3_0_pins[] = { 53, }; +static const int mt7622_pwm_ch3_0_funcs[] = { 3, }; +static const int mt7622_pwm_ch3_1_pins[] = { 75, }; +static const int mt7622_pwm_ch3_1_funcs[] = { 4, }; +static const int mt7622_pwm_ch3_2_pins[] = { 97, }; +static const int mt7622_pwm_ch3_2_funcs[] = { 0, }; +static const int mt7622_pwm_ch4_0_pins[] = { 54, }; +static const int mt7622_pwm_ch4_0_funcs[] = { 3, }; +static const int mt7622_pwm_ch4_1_pins[] = { 67, }; +static const int mt7622_pwm_ch4_1_funcs[] = { 3, }; +static const int mt7622_pwm_ch4_2_pins[] = { 76, }; +static const int mt7622_pwm_ch4_2_funcs[] = { 4, }; +static const int mt7622_pwm_ch4_3_pins[] = { 98, }; +static const int mt7622_pwm_ch4_3_funcs[] = { 0, }; +static const int mt7622_pwm_ch5_0_pins[] = { 68, }; +static const int mt7622_pwm_ch5_0_funcs[] = { 3, }; +static const int mt7622_pwm_ch5_1_pins[] = { 77, }; +static const int mt7622_pwm_ch5_1_funcs[] = { 4, }; +static const int mt7622_pwm_ch5_2_pins[] = { 99, }; +static const int mt7622_pwm_ch5_2_funcs[] = { 0, }; +static const int mt7622_pwm_ch6_0_pins[] = { 69, }; +static const int mt7622_pwm_ch6_0_funcs[] = { 3, }; +static const int mt7622_pwm_ch6_1_pins[] = { 78, }; +static const int mt7622_pwm_ch6_1_funcs[] = { 4, }; +static const int mt7622_pwm_ch6_2_pins[] = { 81, }; +static const int mt7622_pwm_ch6_2_funcs[] = { 4, }; +static const int mt7622_pwm_ch6_3_pins[] = { 100, }; +static const int mt7622_pwm_ch6_3_funcs[] = { 0, }; +static const int mt7622_pwm_ch7_0_pins[] = { 70, }; +static const int mt7622_pwm_ch7_0_funcs[] = { 3, }; +static const int mt7622_pwm_ch7_1_pins[] = { 82, }; +static const int mt7622_pwm_ch7_1_funcs[] = { 4, }; +static const int mt7622_pwm_ch7_2_pins[] = { 101, }; +static const int mt7622_pwm_ch7_2_funcs[] = { 0, }; /* SD */ -static int mt7622_sd_0_pins[] = { 16, 17, 18, 19, 20, 21, }; -static int mt7622_sd_0_funcs[] = { 2, 2, 2, 2, 2, 2, }; -static int mt7622_sd_1_pins[] = { 25, 26, 27, 28, 29, 30, }; -static int mt7622_sd_1_funcs[] = { 2, 2, 2, 2, 2, 2, }; +static const int mt7622_sd_0_pins[] = { 16, 17, 18, 19, 20, 21, }; +static const int mt7622_sd_0_funcs[] = { 2, 2, 2, 2, 2, 2, }; +static const int mt7622_sd_1_pins[] = { 25, 26, 27, 28, 29, 30, }; +static const int mt7622_sd_1_funcs[] = { 2, 2, 2, 2, 2, 2, }; /* Serial NAND */ -static int mt7622_snfi_pins[] = { 8, 9, 10, 11, 12, 13, }; -static int mt7622_snfi_funcs[] = { 2, 2, 2, 2, 2, 2, }; +static const int mt7622_snfi_pins[] = { 8, 9, 10, 11, 12, 13, }; +static const int mt7622_snfi_funcs[] = { 2, 2, 2, 2, 2, 2, }; /* SPI NOR */ -static int mt7622_spi_pins[] = { 8, 9, 10, 11, 12, 13 }; -static int mt7622_spi_funcs[] = { 0, 0, 0, 0, 0, 0, }; +static const int mt7622_spi_pins[] = { 8, 9, 10, 11, 12, 13 }; +static const int mt7622_spi_funcs[] = { 0, 0, 0, 0, 0, 0, }; /* SPIC */ -static int mt7622_spic0_0_pins[] = { 63, 64, 65, 66, }; -static int mt7622_spic0_0_funcs[] = { 4, 4, 4, 4, }; -static int mt7622_spic0_1_pins[] = { 79, 80, 81, 82, }; -static int mt7622_spic0_1_funcs[] = { 3, 3, 3, 3, }; -static int mt7622_spic1_0_pins[] = { 67, 68, 69, 70, }; -static int mt7622_spic1_0_funcs[] = { 4, 4, 4, 4, }; -static int mt7622_spic1_1_pins[] = { 73, 74, 75, 76, }; -static int mt7622_spic1_1_funcs[] = { 0, 0, 0, 0, }; -static int mt7622_spic2_0_pins[] = { 10, 11, 12, 13, }; -static int mt7622_spic2_0_funcs[] = { 0, 0, 0, 0, }; -static int mt7622_spic2_0_wp_hold_pins[] = { 8, 9, }; -static int mt7622_spic2_0_wp_hold_funcs[] = { 0, 0, }; +static const int mt7622_spic0_0_pins[] = { 63, 64, 65, 66, }; +static const int mt7622_spic0_0_funcs[] = { 4, 4, 4, 4, }; +static const int mt7622_spic0_1_pins[] = { 79, 80, 81, 82, }; +static const int mt7622_spic0_1_funcs[] = { 3, 3, 3, 3, }; +static const int mt7622_spic1_0_pins[] = { 67, 68, 69, 70, }; +static const int mt7622_spic1_0_funcs[] = { 4, 4, 4, 4, }; +static const int mt7622_spic1_1_pins[] = { 73, 74, 75, 76, }; +static const int mt7622_spic1_1_funcs[] = { 0, 0, 0, 0, }; +static const int mt7622_spic2_0_pins[] = { 10, 11, 12, 13, }; +static const int mt7622_spic2_0_funcs[] = { 0, 0, 0, 0, }; +static const int mt7622_spic2_0_wp_hold_pins[] = { 8, 9, }; +static const int mt7622_spic2_0_wp_hold_funcs[] = { 0, 0, }; /* TDM */ -static int mt7622_tdm_0_out_mclk_bclk_ws_pins[] = { 8, 9, 10, }; -static int mt7622_tdm_0_out_mclk_bclk_ws_funcs[] = { 3, 3, 3, }; -static int mt7622_tdm_0_in_mclk_bclk_ws_pins[] = { 11, 12, 13, }; -static int mt7622_tdm_0_in_mclk_bclk_ws_funcs[] = { 3, 3, 3, }; -static int mt7622_tdm_0_out_data_pins[] = { 20, }; -static int mt7622_tdm_0_out_data_funcs[] = { 3, }; -static int mt7622_tdm_0_in_data_pins[] = { 21, }; -static int mt7622_tdm_0_in_data_funcs[] = { 3, }; -static int mt7622_tdm_1_out_mclk_bclk_ws_pins[] = { 57, 58, 59, }; -static int mt7622_tdm_1_out_mclk_bclk_ws_funcs[] = { 3, 3, 3, }; -static int mt7622_tdm_1_in_mclk_bclk_ws_pins[] = { 60, 61, 62, }; -static int mt7622_tdm_1_in_mclk_bclk_ws_funcs[] = { 3, 3, 3, }; -static int mt7622_tdm_1_out_data_pins[] = { 55, }; -static int mt7622_tdm_1_out_data_funcs[] = { 3, }; -static int mt7622_tdm_1_in_data_pins[] = { 56, }; -static int mt7622_tdm_1_in_data_funcs[] = { 3, }; +static const int mt7622_tdm_0_out_mclk_bclk_ws_pins[] = { 8, 9, 10, }; +static const int mt7622_tdm_0_out_mclk_bclk_ws_funcs[] = { 3, 3, 3, }; +static const int mt7622_tdm_0_in_mclk_bclk_ws_pins[] = { 11, 12, 13, }; +static const int mt7622_tdm_0_in_mclk_bclk_ws_funcs[] = { 3, 3, 3, }; +static const int mt7622_tdm_0_out_data_pins[] = { 20, }; +static const int mt7622_tdm_0_out_data_funcs[] = { 3, }; +static const int mt7622_tdm_0_in_data_pins[] = { 21, }; +static const int mt7622_tdm_0_in_data_funcs[] = { 3, }; +static const int mt7622_tdm_1_out_mclk_bclk_ws_pins[] = { 57, 58, 59, }; +static const int mt7622_tdm_1_out_mclk_bclk_ws_funcs[] = { 3, 3, 3, }; +static const int mt7622_tdm_1_in_mclk_bclk_ws_pins[] = { 60, 61, 62, }; +static const int mt7622_tdm_1_in_mclk_bclk_ws_funcs[] = { 3, 3, 3, }; +static const int mt7622_tdm_1_out_data_pins[] = { 55, }; +static const int mt7622_tdm_1_out_data_funcs[] = { 3, }; +static const int mt7622_tdm_1_in_data_pins[] = { 56, }; +static const int mt7622_tdm_1_in_data_funcs[] = { 3, }; /* UART */ -static int mt7622_uart0_0_tx_rx_pins[] = { 6, 7, }; -static int mt7622_uart0_0_tx_rx_funcs[] = { 0, 0, }; -static int mt7622_uart1_0_tx_rx_pins[] = { 55, 56, }; -static int mt7622_uart1_0_tx_rx_funcs[] = { 2, 2, }; -static int mt7622_uart1_0_rts_cts_pins[] = { 57, 58, }; -static int mt7622_uart1_0_rts_cts_funcs[] = { 2, 2, }; -static int mt7622_uart1_1_tx_rx_pins[] = { 73, 74, }; -static int mt7622_uart1_1_tx_rx_funcs[] = { 2, 2, }; -static int mt7622_uart1_1_rts_cts_pins[] = { 75, 76, }; -static int mt7622_uart1_1_rts_cts_funcs[] = { 2, 2, }; -static int mt7622_uart2_0_tx_rx_pins[] = { 3, 4, }; -static int mt7622_uart2_0_tx_rx_funcs[] = { 2, 2, }; -static int mt7622_uart2_0_rts_cts_pins[] = { 1, 2, }; -static int mt7622_uart2_0_rts_cts_funcs[] = { 2, 2, }; -static int mt7622_uart2_1_tx_rx_pins[] = { 51, 52, }; -static int mt7622_uart2_1_tx_rx_funcs[] = { 0, 0, }; -static int mt7622_uart2_1_rts_cts_pins[] = { 53, 54, }; -static int mt7622_uart2_1_rts_cts_funcs[] = { 0, 0, }; -static int mt7622_uart2_2_tx_rx_pins[] = { 59, 60, }; -static int mt7622_uart2_2_tx_rx_funcs[] = { 4, 4, }; -static int mt7622_uart2_2_rts_cts_pins[] = { 61, 62, }; -static int mt7622_uart2_2_rts_cts_funcs[] = { 4, 4, }; -static int mt7622_uart2_3_tx_rx_pins[] = { 95, 96, }; -static int mt7622_uart2_3_tx_rx_funcs[] = { 3, 3, }; -static int mt7622_uart3_0_tx_rx_pins[] = { 57, 58, }; -static int mt7622_uart3_0_tx_rx_funcs[] = { 5, 5, }; -static int mt7622_uart3_1_tx_rx_pins[] = { 81, 82, }; -static int mt7622_uart3_1_tx_rx_funcs[] = { 0, 0, }; -static int mt7622_uart3_1_rts_cts_pins[] = { 79, 80, }; -static int mt7622_uart3_1_rts_cts_funcs[] = { 0, 0, }; -static int mt7622_uart4_0_tx_rx_pins[] = { 61, 62, }; -static int mt7622_uart4_0_tx_rx_funcs[] = { 5, 5, }; -static int mt7622_uart4_1_tx_rx_pins[] = { 91, 92, }; -static int mt7622_uart4_1_tx_rx_funcs[] = { 0, 0, }; -static int mt7622_uart4_1_rts_cts_pins[] = { 93, 94 }; -static int mt7622_uart4_1_rts_cts_funcs[] = { 0, 0, }; -static int mt7622_uart4_2_tx_rx_pins[] = { 97, 98, }; -static int mt7622_uart4_2_tx_rx_funcs[] = { 2, 2, }; -static int mt7622_uart4_2_rts_cts_pins[] = { 95, 96 }; -static int mt7622_uart4_2_rts_cts_funcs[] = { 2, 2, }; +static const int mt7622_uart0_0_tx_rx_pins[] = { 6, 7, }; +static const int mt7622_uart0_0_tx_rx_funcs[] = { 0, 0, }; +static const int mt7622_uart1_0_tx_rx_pins[] = { 55, 56, }; +static const int mt7622_uart1_0_tx_rx_funcs[] = { 2, 2, }; +static const int mt7622_uart1_0_rts_cts_pins[] = { 57, 58, }; +static const int mt7622_uart1_0_rts_cts_funcs[] = { 2, 2, }; +static const int mt7622_uart1_1_tx_rx_pins[] = { 73, 74, }; +static const int mt7622_uart1_1_tx_rx_funcs[] = { 2, 2, }; +static const int mt7622_uart1_1_rts_cts_pins[] = { 75, 76, }; +static const int mt7622_uart1_1_rts_cts_funcs[] = { 2, 2, }; +static const int mt7622_uart2_0_tx_rx_pins[] = { 3, 4, }; +static const int mt7622_uart2_0_tx_rx_funcs[] = { 2, 2, }; +static const int mt7622_uart2_0_rts_cts_pins[] = { 1, 2, }; +static const int mt7622_uart2_0_rts_cts_funcs[] = { 2, 2, }; +static const int mt7622_uart2_1_tx_rx_pins[] = { 51, 52, }; +static const int mt7622_uart2_1_tx_rx_funcs[] = { 0, 0, }; +static const int mt7622_uart2_1_rts_cts_pins[] = { 53, 54, }; +static const int mt7622_uart2_1_rts_cts_funcs[] = { 0, 0, }; +static const int mt7622_uart2_2_tx_rx_pins[] = { 59, 60, }; +static const int mt7622_uart2_2_tx_rx_funcs[] = { 4, 4, }; +static const int mt7622_uart2_2_rts_cts_pins[] = { 61, 62, }; +static const int mt7622_uart2_2_rts_cts_funcs[] = { 4, 4, }; +static const int mt7622_uart2_3_tx_rx_pins[] = { 95, 96, }; +static const int mt7622_uart2_3_tx_rx_funcs[] = { 3, 3, }; +static const int mt7622_uart3_0_tx_rx_pins[] = { 57, 58, }; +static const int mt7622_uart3_0_tx_rx_funcs[] = { 5, 5, }; +static const int mt7622_uart3_1_tx_rx_pins[] = { 81, 82, }; +static const int mt7622_uart3_1_tx_rx_funcs[] = { 0, 0, }; +static const int mt7622_uart3_1_rts_cts_pins[] = { 79, 80, }; +static const int mt7622_uart3_1_rts_cts_funcs[] = { 0, 0, }; +static const int mt7622_uart4_0_tx_rx_pins[] = { 61, 62, }; +static const int mt7622_uart4_0_tx_rx_funcs[] = { 5, 5, }; +static const int mt7622_uart4_1_tx_rx_pins[] = { 91, 92, }; +static const int mt7622_uart4_1_tx_rx_funcs[] = { 0, 0, }; +static const int mt7622_uart4_1_rts_cts_pins[] = { 93, 94 }; +static const int mt7622_uart4_1_rts_cts_funcs[] = { 0, 0, }; +static const int mt7622_uart4_2_tx_rx_pins[] = { 97, 98, }; +static const int mt7622_uart4_2_tx_rx_funcs[] = { 2, 2, }; +static const int mt7622_uart4_2_rts_cts_pins[] = { 95, 96 }; +static const int mt7622_uart4_2_rts_cts_funcs[] = { 2, 2, }; /* Watchdog */ -static int mt7622_watchdog_pins[] = { 78, }; -static int mt7622_watchdog_funcs[] = { 0, }; +static const int mt7622_watchdog_pins[] = { 78, }; +static const int mt7622_watchdog_funcs[] = { 0, }; /* WLAN LED */ -static int mt7622_wled_pins[] = { 85, }; -static int mt7622_wled_funcs[] = { 0, }; +static const int mt7622_wled_pins[] = { 85, }; +static const int mt7622_wled_funcs[] = { 0, }; static const struct mtk_group_desc mt7622_groups[] = { PINCTRL_PIN_GROUP("emmc", mt7622_emmc), @@ -719,7 +721,7 @@ static const struct mtk_function_desc mt7622_functions[] = { {"watchdog", mt7622_wdt_groups, ARRAY_SIZE(mt7622_wdt_groups)}, }; -static struct mtk_pinctrl_soc mt7622_data = { +static const struct mtk_pinctrl_soc mt7622_data = { .name = "mt7622_pinctrl", .reg_cal = mt7622_reg_cals, .pins = mt7622_pins, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7623.c b/drivers/pinctrl/mediatek/pinctrl-mt7623.c index 2e3ae34..2703e6f 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7623.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7623.c @@ -692,377 +692,377 @@ static const struct mtk_pin_desc mt7623_pins[] = { */ /* AUDIO EXT CLK */ -static int mt7623_aud_ext_clk0_pins[] = { 208, }; -static int mt7623_aud_ext_clk0_funcs[] = { 1, }; -static int mt7623_aud_ext_clk1_pins[] = { 209, }; -static int mt7623_aud_ext_clk1_funcs[] = { 1, }; +static const int mt7623_aud_ext_clk0_pins[] = { 208, }; +static const int mt7623_aud_ext_clk0_funcs[] = { 1, }; +static const int mt7623_aud_ext_clk1_pins[] = { 209, }; +static const int mt7623_aud_ext_clk1_funcs[] = { 1, }; /* DISP PWM */ -static int mt7623_disp_pwm_0_pins[] = { 72, }; -static int mt7623_disp_pwm_0_funcs[] = { 5, }; -static int mt7623_disp_pwm_1_pins[] = { 203, }; -static int mt7623_disp_pwm_1_funcs[] = { 2, }; -static int mt7623_disp_pwm_2_pins[] = { 208, }; -static int mt7623_disp_pwm_2_funcs[] = { 5, }; +static const int mt7623_disp_pwm_0_pins[] = { 72, }; +static const int mt7623_disp_pwm_0_funcs[] = { 5, }; +static const int mt7623_disp_pwm_1_pins[] = { 203, }; +static const int mt7623_disp_pwm_1_funcs[] = { 2, }; +static const int mt7623_disp_pwm_2_pins[] = { 208, }; +static const int mt7623_disp_pwm_2_funcs[] = { 5, }; /* ESW */ -static int mt7623_esw_int_pins[] = { 273, }; -static int mt7623_esw_int_funcs[] = { 1, }; -static int mt7623_esw_rst_pins[] = { 277, }; -static int mt7623_esw_rst_funcs[] = { 1, }; +static const int mt7623_esw_int_pins[] = { 273, }; +static const int mt7623_esw_int_funcs[] = { 1, }; +static const int mt7623_esw_rst_pins[] = { 277, }; +static const int mt7623_esw_rst_funcs[] = { 1, }; /* EPHY */ -static int mt7623_ephy_pins[] = { 262, 263, 264, 265, 266, 267, 268, - 269, 270, 271, 272, 274, }; -static int mt7623_ephy_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; +static const int mt7623_ephy_pins[] = { 262, 263, 264, 265, 266, 267, 268, + 269, 270, 271, 272, 274, }; +static const int mt7623_ephy_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; /* EXT_SDIO */ -static int mt7623_ext_sdio_pins[] = { 236, 237, 238, 239, 240, 241, }; -static int mt7623_ext_sdio_funcs[] = { 1, 1, 1, 1, 1, 1, }; +static const int mt7623_ext_sdio_pins[] = { 236, 237, 238, 239, 240, 241, }; +static const int mt7623_ext_sdio_funcs[] = { 1, 1, 1, 1, 1, 1, }; /* HDMI RX */ -static int mt7623_hdmi_rx_pins[] = { 247, 248, }; -static int mt7623_hdmi_rx_funcs[] = { 1, 1 }; -static int mt7623_hdmi_rx_i2c_pins[] = { 244, 245, }; -static int mt7623_hdmi_rx_i2c_funcs[] = { 1, 1 }; +static const int mt7623_hdmi_rx_pins[] = { 247, 248, }; +static const int mt7623_hdmi_rx_funcs[] = { 1, 1 }; +static const int mt7623_hdmi_rx_i2c_pins[] = { 244, 245, }; +static const int mt7623_hdmi_rx_i2c_funcs[] = { 1, 1 }; /* HDMI TX */ -static int mt7623_hdmi_cec_pins[] = { 122, }; -static int mt7623_hdmi_cec_funcs[] = { 1, }; -static int mt7623_hdmi_htplg_pins[] = { 123, }; -static int mt7623_hdmi_htplg_funcs[] = { 1, }; -static int mt7623_hdmi_i2c_pins[] = { 124, 125, }; -static int mt7623_hdmi_i2c_funcs[] = { 1, 1 }; +static const int mt7623_hdmi_cec_pins[] = { 122, }; +static const int mt7623_hdmi_cec_funcs[] = { 1, }; +static const int mt7623_hdmi_htplg_pins[] = { 123, }; +static const int mt7623_hdmi_htplg_funcs[] = { 1, }; +static const int mt7623_hdmi_i2c_pins[] = { 124, 125, }; +static const int mt7623_hdmi_i2c_funcs[] = { 1, 1 }; /* I2C */ -static int mt7623_i2c0_pins[] = { 75, 76, }; -static int mt7623_i2c0_funcs[] = { 1, 1, }; -static int mt7623_i2c1_0_pins[] = { 57, 58, }; -static int mt7623_i2c1_0_funcs[] = { 1, 1, }; -static int mt7623_i2c1_1_pins[] = { 242, 243, }; -static int mt7623_i2c1_1_funcs[] = { 4, 4, }; -static int mt7623_i2c1_2_pins[] = { 85, 86, }; -static int mt7623_i2c1_2_funcs[] = { 3, 3, }; -static int mt7623_i2c1_3_pins[] = { 105, 106, }; -static int mt7623_i2c1_3_funcs[] = { 3, 3, }; -static int mt7623_i2c1_4_pins[] = { 124, 125, }; -static int mt7623_i2c1_4_funcs[] = { 4, 4, }; -static int mt7623_i2c2_0_pins[] = { 77, 78, }; -static int mt7623_i2c2_0_funcs[] = { 1, 1, }; -static int mt7623_i2c2_1_pins[] = { 89, 90, }; -static int mt7623_i2c2_1_funcs[] = { 3, 3, }; -static int mt7623_i2c2_2_pins[] = { 109, 110, }; -static int mt7623_i2c2_2_funcs[] = { 3, 3, }; -static int mt7623_i2c2_3_pins[] = { 122, 123, }; -static int mt7623_i2c2_3_funcs[] = { 4, 4, }; +static const int mt7623_i2c0_pins[] = { 75, 76, }; +static const int mt7623_i2c0_funcs[] = { 1, 1, }; +static const int mt7623_i2c1_0_pins[] = { 57, 58, }; +static const int mt7623_i2c1_0_funcs[] = { 1, 1, }; +static const int mt7623_i2c1_1_pins[] = { 242, 243, }; +static const int mt7623_i2c1_1_funcs[] = { 4, 4, }; +static const int mt7623_i2c1_2_pins[] = { 85, 86, }; +static const int mt7623_i2c1_2_funcs[] = { 3, 3, }; +static const int mt7623_i2c1_3_pins[] = { 105, 106, }; +static const int mt7623_i2c1_3_funcs[] = { 3, 3, }; +static const int mt7623_i2c1_4_pins[] = { 124, 125, }; +static const int mt7623_i2c1_4_funcs[] = { 4, 4, }; +static const int mt7623_i2c2_0_pins[] = { 77, 78, }; +static const int mt7623_i2c2_0_funcs[] = { 1, 1, }; +static const int mt7623_i2c2_1_pins[] = { 89, 90, }; +static const int mt7623_i2c2_1_funcs[] = { 3, 3, }; +static const int mt7623_i2c2_2_pins[] = { 109, 110, }; +static const int mt7623_i2c2_2_funcs[] = { 3, 3, }; +static const int mt7623_i2c2_3_pins[] = { 122, 123, }; +static const int mt7623_i2c2_3_funcs[] = { 4, 4, }; /* I2S */ -static int mt7623_i2s0_pins[] = { 49, 72, 73, 74, 126, }; -static int mt7623_i2s0_funcs[] = { 1, 1, 1, 1, 1, }; -static int mt7623_i2s1_pins[] = { 33, 34, 35, 36, 37, }; -static int mt7623_i2s1_funcs[] = { 1, 1, 1, 1, 1, }; -static int mt7623_i2s2_bclk_lrclk_mclk_pins[] = { 50, 52, 188, }; -static int mt7623_i2s2_bclk_lrclk_mclk_funcs[] = { 1, 1, 1, }; -static int mt7623_i2s2_data_in_pins[] = { 51, }; -static int mt7623_i2s2_data_in_funcs[] = { 1, }; -static int mt7623_i2s2_data_0_pins[] = { 203, }; -static int mt7623_i2s2_data_0_funcs[] = { 9, }; -static int mt7623_i2s2_data_1_pins[] = { 38, }; -static int mt7623_i2s2_data_1_funcs[] = { 4, }; -static int mt7623_i2s3_bclk_lrclk_mclk_pins[] = { 191, 192, 193, }; -static int mt7623_i2s3_bclk_lrclk_mclk_funcs[] = { 1, 1, 1, }; -static int mt7623_i2s3_data_in_pins[] = { 190, }; -static int mt7623_i2s3_data_in_funcs[] = { 1, }; -static int mt7623_i2s3_data_0_pins[] = { 204, }; -static int mt7623_i2s3_data_0_funcs[] = { 9, }; -static int mt7623_i2s3_data_1_pins[] = { 2, }; -static int mt7623_i2s3_data_1_funcs[] = { 0, }; -static int mt7623_i2s4_pins[] = { 194, 195, 196, 197, 198, }; -static int mt7623_i2s4_funcs[] = { 1, 1, 1, 1, 1, }; -static int mt7623_i2s5_pins[] = { 16, 17, 30, 31, 32, }; -static int mt7623_i2s5_funcs[] = { 1, 1, 1, 1, 1, }; +static const int mt7623_i2s0_pins[] = { 49, 72, 73, 74, 126, }; +static const int mt7623_i2s0_funcs[] = { 1, 1, 1, 1, 1, }; +static const int mt7623_i2s1_pins[] = { 33, 34, 35, 36, 37, }; +static const int mt7623_i2s1_funcs[] = { 1, 1, 1, 1, 1, }; +static const int mt7623_i2s2_bclk_lrclk_mclk_pins[] = { 50, 52, 188, }; +static const int mt7623_i2s2_bclk_lrclk_mclk_funcs[] = { 1, 1, 1, }; +static const int mt7623_i2s2_data_in_pins[] = { 51, }; +static const int mt7623_i2s2_data_in_funcs[] = { 1, }; +static const int mt7623_i2s2_data_0_pins[] = { 203, }; +static const int mt7623_i2s2_data_0_funcs[] = { 9, }; +static const int mt7623_i2s2_data_1_pins[] = { 38, }; +static const int mt7623_i2s2_data_1_funcs[] = { 4, }; +static const int mt7623_i2s3_bclk_lrclk_mclk_pins[] = { 191, 192, 193, }; +static const int mt7623_i2s3_bclk_lrclk_mclk_funcs[] = { 1, 1, 1, }; +static const int mt7623_i2s3_data_in_pins[] = { 190, }; +static const int mt7623_i2s3_data_in_funcs[] = { 1, }; +static const int mt7623_i2s3_data_0_pins[] = { 204, }; +static const int mt7623_i2s3_data_0_funcs[] = { 9, }; +static const int mt7623_i2s3_data_1_pins[] = { 2, }; +static const int mt7623_i2s3_data_1_funcs[] = { 0, }; +static const int mt7623_i2s4_pins[] = { 194, 195, 196, 197, 198, }; +static const int mt7623_i2s4_funcs[] = { 1, 1, 1, 1, 1, }; +static const int mt7623_i2s5_pins[] = { 16, 17, 30, 31, 32, }; +static const int mt7623_i2s5_funcs[] = { 1, 1, 1, 1, 1, }; /* IR */ -static int mt7623_ir_pins[] = { 46, }; -static int mt7623_ir_funcs[] = { 1, }; +static const int mt7623_ir_pins[] = { 46, }; +static const int mt7623_ir_funcs[] = { 1, }; /* LCD */ -static int mt7623_mipi_tx_pins[] = { 91, 92, 93, 94, 95, 96, 97, 98, - 99, 100, }; -static int mt7623_mipi_tx_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; -static int mt7623_dsi_te_pins[] = { 84, }; -static int mt7623_dsi_te_funcs[] = { 1, }; -static int mt7623_lcm_rst_pins[] = { 83, }; -static int mt7623_lcm_rst_funcs[] = { 1, }; +static const int mt7623_mipi_tx_pins[] = { 91, 92, 93, 94, 95, 96, 97, 98, + 99, 100, }; +static const int mt7623_mipi_tx_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; +static const int mt7623_dsi_te_pins[] = { 84, }; +static const int mt7623_dsi_te_funcs[] = { 1, }; +static const int mt7623_lcm_rst_pins[] = { 83, }; +static const int mt7623_lcm_rst_funcs[] = { 1, }; /* MDC/MDIO */ -static int mt7623_mdc_mdio_pins[] = { 275, 276, }; -static int mt7623_mdc_mdio_funcs[] = { 1, 1, }; +static const int mt7623_mdc_mdio_pins[] = { 275, 276, }; +static const int mt7623_mdc_mdio_funcs[] = { 1, 1, }; /* MSDC */ -static int mt7623_msdc0_pins[] = { 111, 112, 113, 114, 115, 116, 117, 118, - 119, 120, 121, }; -static int mt7623_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; -static int mt7623_msdc1_pins[] = { 105, 106, 107, 108, 109, 110, }; -static int mt7623_msdc1_funcs[] = { 1, 1, 1, 1, 1, 1, }; -static int mt7623_msdc1_ins_pins[] = { 261, }; -static int mt7623_msdc1_ins_funcs[] = { 1, }; -static int mt7623_msdc1_wp_0_pins[] = { 29, }; -static int mt7623_msdc1_wp_0_funcs[] = { 1, }; -static int mt7623_msdc1_wp_1_pins[] = { 55, }; -static int mt7623_msdc1_wp_1_funcs[] = { 3, }; -static int mt7623_msdc1_wp_2_pins[] = { 209, }; -static int mt7623_msdc1_wp_2_funcs[] = { 2, }; -static int mt7623_msdc2_pins[] = { 85, 86, 87, 88, 89, 90, }; -static int mt7623_msdc2_funcs[] = { 1, 1, 1, 1, 1, 1, }; -static int mt7623_msdc3_pins[] = { 249, 250, 251, 252, 253, 254, 255, 256, - 257, 258, 259, 260, }; -static int mt7623_msdc3_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; +static const int mt7623_msdc0_pins[] = { 111, 112, 113, 114, 115, 116, 117, 118, + 119, 120, 121, }; +static const int mt7623_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; +static const int mt7623_msdc1_pins[] = { 105, 106, 107, 108, 109, 110, }; +static const int mt7623_msdc1_funcs[] = { 1, 1, 1, 1, 1, 1, }; +static const int mt7623_msdc1_ins_pins[] = { 261, }; +static const int mt7623_msdc1_ins_funcs[] = { 1, }; +static const int mt7623_msdc1_wp_0_pins[] = { 29, }; +static const int mt7623_msdc1_wp_0_funcs[] = { 1, }; +static const int mt7623_msdc1_wp_1_pins[] = { 55, }; +static const int mt7623_msdc1_wp_1_funcs[] = { 3, }; +static const int mt7623_msdc1_wp_2_pins[] = { 209, }; +static const int mt7623_msdc1_wp_2_funcs[] = { 2, }; +static const int mt7623_msdc2_pins[] = { 85, 86, 87, 88, 89, 90, }; +static const int mt7623_msdc2_funcs[] = { 1, 1, 1, 1, 1, 1, }; +static const int mt7623_msdc3_pins[] = { 249, 250, 251, 252, 253, 254, 255, 256, + 257, 258, 259, 260, }; +static const int mt7623_msdc3_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; /* NAND */ -static int mt7623_nandc_pins[] = { 43, 47, 48, 111, 112, 113, 114, 115, - 116, 117, 118, 119, 120, 121, }; -static int mt7623_nandc_funcs[] = { 1, 1, 1, 4, 4, 4, 4, 4, 4, 4, 4, 4, - 4, 4, }; -static int mt7623_nandc_ceb0_pins[] = { 45, }; -static int mt7623_nandc_ceb0_funcs[] = { 1, }; -static int mt7623_nandc_ceb1_pins[] = { 44, }; -static int mt7623_nandc_ceb1_funcs[] = { 1, }; +static const int mt7623_nandc_pins[] = { 43, 47, 48, 111, 112, 113, 114, 115, + 116, 117, 118, 119, 120, 121, }; +static const int mt7623_nandc_funcs[] = { 1, 1, 1, 4, 4, 4, 4, 4, 4, 4, 4, 4, + 4, 4, }; +static const int mt7623_nandc_ceb0_pins[] = { 45, }; +static const int mt7623_nandc_ceb0_funcs[] = { 1, }; +static const int mt7623_nandc_ceb1_pins[] = { 44, }; +static const int mt7623_nandc_ceb1_funcs[] = { 1, }; /* RTC */ -static int mt7623_rtc_pins[] = { 10, }; -static int mt7623_rtc_funcs[] = { 1, }; +static const int mt7623_rtc_pins[] = { 10, }; +static const int mt7623_rtc_funcs[] = { 1, }; /* OTG */ -static int mt7623_otg_iddig0_0_pins[] = { 29, }; -static int mt7623_otg_iddig0_0_funcs[] = { 1, }; -static int mt7623_otg_iddig0_1_pins[] = { 44, }; -static int mt7623_otg_iddig0_1_funcs[] = { 2, }; -static int mt7623_otg_iddig0_2_pins[] = { 236, }; -static int mt7623_otg_iddig0_2_funcs[] = { 2, }; -static int mt7623_otg_iddig1_0_pins[] = { 27, }; -static int mt7623_otg_iddig1_0_funcs[] = { 2, }; -static int mt7623_otg_iddig1_1_pins[] = { 47, }; -static int mt7623_otg_iddig1_1_funcs[] = { 2, }; -static int mt7623_otg_iddig1_2_pins[] = { 238, }; -static int mt7623_otg_iddig1_2_funcs[] = { 2, }; -static int mt7623_otg_drv_vbus0_0_pins[] = { 28, }; -static int mt7623_otg_drv_vbus0_0_funcs[] = { 1, }; -static int mt7623_otg_drv_vbus0_1_pins[] = { 45, }; -static int mt7623_otg_drv_vbus0_1_funcs[] = { 2, }; -static int mt7623_otg_drv_vbus0_2_pins[] = { 237, }; -static int mt7623_otg_drv_vbus0_2_funcs[] = { 2, }; -static int mt7623_otg_drv_vbus1_0_pins[] = { 26, }; -static int mt7623_otg_drv_vbus1_0_funcs[] = { 2, }; -static int mt7623_otg_drv_vbus1_1_pins[] = { 48, }; -static int mt7623_otg_drv_vbus1_1_funcs[] = { 2, }; -static int mt7623_otg_drv_vbus1_2_pins[] = { 239, }; -static int mt7623_otg_drv_vbus1_2_funcs[] = { 2, }; +static const int mt7623_otg_iddig0_0_pins[] = { 29, }; +static const int mt7623_otg_iddig0_0_funcs[] = { 1, }; +static const int mt7623_otg_iddig0_1_pins[] = { 44, }; +static const int mt7623_otg_iddig0_1_funcs[] = { 2, }; +static const int mt7623_otg_iddig0_2_pins[] = { 236, }; +static const int mt7623_otg_iddig0_2_funcs[] = { 2, }; +static const int mt7623_otg_iddig1_0_pins[] = { 27, }; +static const int mt7623_otg_iddig1_0_funcs[] = { 2, }; +static const int mt7623_otg_iddig1_1_pins[] = { 47, }; +static const int mt7623_otg_iddig1_1_funcs[] = { 2, }; +static const int mt7623_otg_iddig1_2_pins[] = { 238, }; +static const int mt7623_otg_iddig1_2_funcs[] = { 2, }; +static const int mt7623_otg_drv_vbus0_0_pins[] = { 28, }; +static const int mt7623_otg_drv_vbus0_0_funcs[] = { 1, }; +static const int mt7623_otg_drv_vbus0_1_pins[] = { 45, }; +static const int mt7623_otg_drv_vbus0_1_funcs[] = { 2, }; +static const int mt7623_otg_drv_vbus0_2_pins[] = { 237, }; +static const int mt7623_otg_drv_vbus0_2_funcs[] = { 2, }; +static const int mt7623_otg_drv_vbus1_0_pins[] = { 26, }; +static const int mt7623_otg_drv_vbus1_0_funcs[] = { 2, }; +static const int mt7623_otg_drv_vbus1_1_pins[] = { 48, }; +static const int mt7623_otg_drv_vbus1_1_funcs[] = { 2, }; +static const int mt7623_otg_drv_vbus1_2_pins[] = { 239, }; +static const int mt7623_otg_drv_vbus1_2_funcs[] = { 2, }; /* PCIE */ -static int mt7623_pcie0_0_perst_pins[] = { 208, }; -static int mt7623_pcie0_0_perst_funcs[] = { 3, }; -static int mt7623_pcie0_1_perst_pins[] = { 22, }; -static int mt7623_pcie0_1_perst_funcs[] = { 2, }; -static int mt7623_pcie1_0_perst_pins[] = { 209, }; -static int mt7623_pcie1_0_perst_funcs[] = { 3, }; -static int mt7623_pcie1_1_perst_pins[] = { 23, }; -static int mt7623_pcie1_1_perst_funcs[] = { 2, }; -static int mt7623_pcie2_0_perst_pins[] = { 24, }; -static int mt7623_pcie2_0_perst_funcs[] = { 2, }; -static int mt7623_pcie2_1_perst_pins[] = { 29, }; -static int mt7623_pcie2_1_perst_funcs[] = { 6, }; -static int mt7623_pcie0_0_wake_pins[] = { 28, }; -static int mt7623_pcie0_0_wake_funcs[] = { 6, }; -static int mt7623_pcie0_1_wake_pins[] = { 251, }; -static int mt7623_pcie0_1_wake_funcs[] = { 6, }; -static int mt7623_pcie1_0_wake_pins[] = { 27, }; -static int mt7623_pcie1_0_wake_funcs[] = { 6, }; -static int mt7623_pcie1_1_wake_pins[] = { 253, }; -static int mt7623_pcie1_1_wake_funcs[] = { 6, }; -static int mt7623_pcie2_0_wake_pins[] = { 26, }; -static int mt7623_pcie2_0_wake_funcs[] = { 6, }; -static int mt7623_pcie2_1_wake_pins[] = { 255, }; -static int mt7623_pcie2_1_wake_funcs[] = { 6, }; -static int mt7623_pcie0_clkreq_pins[] = { 250, }; -static int mt7623_pcie0_clkreq_funcs[] = { 6, }; -static int mt7623_pcie1_clkreq_pins[] = { 252, }; -static int mt7623_pcie1_clkreq_funcs[] = { 6, }; -static int mt7623_pcie2_clkreq_pins[] = { 254, }; -static int mt7623_pcie2_clkreq_funcs[] = { 6, }; +static const int mt7623_pcie0_0_perst_pins[] = { 208, }; +static const int mt7623_pcie0_0_perst_funcs[] = { 3, }; +static const int mt7623_pcie0_1_perst_pins[] = { 22, }; +static const int mt7623_pcie0_1_perst_funcs[] = { 2, }; +static const int mt7623_pcie1_0_perst_pins[] = { 209, }; +static const int mt7623_pcie1_0_perst_funcs[] = { 3, }; +static const int mt7623_pcie1_1_perst_pins[] = { 23, }; +static const int mt7623_pcie1_1_perst_funcs[] = { 2, }; +static const int mt7623_pcie2_0_perst_pins[] = { 24, }; +static const int mt7623_pcie2_0_perst_funcs[] = { 2, }; +static const int mt7623_pcie2_1_perst_pins[] = { 29, }; +static const int mt7623_pcie2_1_perst_funcs[] = { 6, }; +static const int mt7623_pcie0_0_wake_pins[] = { 28, }; +static const int mt7623_pcie0_0_wake_funcs[] = { 6, }; +static const int mt7623_pcie0_1_wake_pins[] = { 251, }; +static const int mt7623_pcie0_1_wake_funcs[] = { 6, }; +static const int mt7623_pcie1_0_wake_pins[] = { 27, }; +static const int mt7623_pcie1_0_wake_funcs[] = { 6, }; +static const int mt7623_pcie1_1_wake_pins[] = { 253, }; +static const int mt7623_pcie1_1_wake_funcs[] = { 6, }; +static const int mt7623_pcie2_0_wake_pins[] = { 26, }; +static const int mt7623_pcie2_0_wake_funcs[] = { 6, }; +static const int mt7623_pcie2_1_wake_pins[] = { 255, }; +static const int mt7623_pcie2_1_wake_funcs[] = { 6, }; +static const int mt7623_pcie0_clkreq_pins[] = { 250, }; +static const int mt7623_pcie0_clkreq_funcs[] = { 6, }; +static const int mt7623_pcie1_clkreq_pins[] = { 252, }; +static const int mt7623_pcie1_clkreq_funcs[] = { 6, }; +static const int mt7623_pcie2_clkreq_pins[] = { 254, }; +static const int mt7623_pcie2_clkreq_funcs[] = { 6, }; /* the pcie_*_rev are only used for MT7623 */ -static int mt7623_pcie0_0_rev_perst_pins[] = { 208, }; -static int mt7623_pcie0_0_rev_perst_funcs[] = { 11, }; -static int mt7623_pcie0_1_rev_perst_pins[] = { 22, }; -static int mt7623_pcie0_1_rev_perst_funcs[] = { 10, }; -static int mt7623_pcie1_0_rev_perst_pins[] = { 209, }; -static int mt7623_pcie1_0_rev_perst_funcs[] = { 11, }; -static int mt7623_pcie1_1_rev_perst_pins[] = { 23, }; -static int mt7623_pcie1_1_rev_perst_funcs[] = { 10, }; -static int mt7623_pcie2_0_rev_perst_pins[] = { 24, }; -static int mt7623_pcie2_0_rev_perst_funcs[] = { 11, }; -static int mt7623_pcie2_1_rev_perst_pins[] = { 29, }; -static int mt7623_pcie2_1_rev_perst_funcs[] = { 14, }; +static const int mt7623_pcie0_0_rev_perst_pins[] = { 208, }; +static const int mt7623_pcie0_0_rev_perst_funcs[] = { 11, }; +static const int mt7623_pcie0_1_rev_perst_pins[] = { 22, }; +static const int mt7623_pcie0_1_rev_perst_funcs[] = { 10, }; +static const int mt7623_pcie1_0_rev_perst_pins[] = { 209, }; +static const int mt7623_pcie1_0_rev_perst_funcs[] = { 11, }; +static const int mt7623_pcie1_1_rev_perst_pins[] = { 23, }; +static const int mt7623_pcie1_1_rev_perst_funcs[] = { 10, }; +static const int mt7623_pcie2_0_rev_perst_pins[] = { 24, }; +static const int mt7623_pcie2_0_rev_perst_funcs[] = { 11, }; +static const int mt7623_pcie2_1_rev_perst_pins[] = { 29, }; +static const int mt7623_pcie2_1_rev_perst_funcs[] = { 14, }; /* PCM */ -static int mt7623_pcm_clk_0_pins[] = { 18, }; -static int mt7623_pcm_clk_0_funcs[] = { 1, }; -static int mt7623_pcm_clk_1_pins[] = { 17, }; -static int mt7623_pcm_clk_1_funcs[] = { 3, }; -static int mt7623_pcm_clk_2_pins[] = { 35, }; -static int mt7623_pcm_clk_2_funcs[] = { 3, }; -static int mt7623_pcm_clk_3_pins[] = { 50, }; -static int mt7623_pcm_clk_3_funcs[] = { 3, }; -static int mt7623_pcm_clk_4_pins[] = { 74, }; -static int mt7623_pcm_clk_4_funcs[] = { 3, }; -static int mt7623_pcm_clk_5_pins[] = { 191, }; -static int mt7623_pcm_clk_5_funcs[] = { 3, }; -static int mt7623_pcm_clk_6_pins[] = { 196, }; -static int mt7623_pcm_clk_6_funcs[] = { 3, }; -static int mt7623_pcm_sync_0_pins[] = { 19, }; -static int mt7623_pcm_sync_0_funcs[] = { 1, }; -static int mt7623_pcm_sync_1_pins[] = { 30, }; -static int mt7623_pcm_sync_1_funcs[] = { 3, }; -static int mt7623_pcm_sync_2_pins[] = { 36, }; -static int mt7623_pcm_sync_2_funcs[] = { 3, }; -static int mt7623_pcm_sync_3_pins[] = { 52, }; -static int mt7623_pcm_sync_3_funcs[] = { 31, }; -static int mt7623_pcm_sync_4_pins[] = { 73, }; -static int mt7623_pcm_sync_4_funcs[] = { 3, }; -static int mt7623_pcm_sync_5_pins[] = { 192, }; -static int mt7623_pcm_sync_5_funcs[] = { 3, }; -static int mt7623_pcm_sync_6_pins[] = { 197, }; -static int mt7623_pcm_sync_6_funcs[] = { 3, }; -static int mt7623_pcm_rx_0_pins[] = { 20, }; -static int mt7623_pcm_rx_0_funcs[] = { 1, }; -static int mt7623_pcm_rx_1_pins[] = { 16, }; -static int mt7623_pcm_rx_1_funcs[] = { 3, }; -static int mt7623_pcm_rx_2_pins[] = { 34, }; -static int mt7623_pcm_rx_2_funcs[] = { 3, }; -static int mt7623_pcm_rx_3_pins[] = { 51, }; -static int mt7623_pcm_rx_3_funcs[] = { 3, }; -static int mt7623_pcm_rx_4_pins[] = { 72, }; -static int mt7623_pcm_rx_4_funcs[] = { 3, }; -static int mt7623_pcm_rx_5_pins[] = { 190, }; -static int mt7623_pcm_rx_5_funcs[] = { 3, }; -static int mt7623_pcm_rx_6_pins[] = { 195, }; -static int mt7623_pcm_rx_6_funcs[] = { 3, }; -static int mt7623_pcm_tx_0_pins[] = { 21, }; -static int mt7623_pcm_tx_0_funcs[] = { 1, }; -static int mt7623_pcm_tx_1_pins[] = { 32, }; -static int mt7623_pcm_tx_1_funcs[] = { 3, }; -static int mt7623_pcm_tx_2_pins[] = { 33, }; -static int mt7623_pcm_tx_2_funcs[] = { 3, }; -static int mt7623_pcm_tx_3_pins[] = { 38, }; -static int mt7623_pcm_tx_3_funcs[] = { 3, }; -static int mt7623_pcm_tx_4_pins[] = { 49, }; -static int mt7623_pcm_tx_4_funcs[] = { 3, }; -static int mt7623_pcm_tx_5_pins[] = { 189, }; -static int mt7623_pcm_tx_5_funcs[] = { 3, }; -static int mt7623_pcm_tx_6_pins[] = { 194, }; -static int mt7623_pcm_tx_6_funcs[] = { 3, }; +static const int mt7623_pcm_clk_0_pins[] = { 18, }; +static const int mt7623_pcm_clk_0_funcs[] = { 1, }; +static const int mt7623_pcm_clk_1_pins[] = { 17, }; +static const int mt7623_pcm_clk_1_funcs[] = { 3, }; +static const int mt7623_pcm_clk_2_pins[] = { 35, }; +static const int mt7623_pcm_clk_2_funcs[] = { 3, }; +static const int mt7623_pcm_clk_3_pins[] = { 50, }; +static const int mt7623_pcm_clk_3_funcs[] = { 3, }; +static const int mt7623_pcm_clk_4_pins[] = { 74, }; +static const int mt7623_pcm_clk_4_funcs[] = { 3, }; +static const int mt7623_pcm_clk_5_pins[] = { 191, }; +static const int mt7623_pcm_clk_5_funcs[] = { 3, }; +static const int mt7623_pcm_clk_6_pins[] = { 196, }; +static const int mt7623_pcm_clk_6_funcs[] = { 3, }; +static const int mt7623_pcm_sync_0_pins[] = { 19, }; +static const int mt7623_pcm_sync_0_funcs[] = { 1, }; +static const int mt7623_pcm_sync_1_pins[] = { 30, }; +static const int mt7623_pcm_sync_1_funcs[] = { 3, }; +static const int mt7623_pcm_sync_2_pins[] = { 36, }; +static const int mt7623_pcm_sync_2_funcs[] = { 3, }; +static const int mt7623_pcm_sync_3_pins[] = { 52, }; +static const int mt7623_pcm_sync_3_funcs[] = { 31, }; +static const int mt7623_pcm_sync_4_pins[] = { 73, }; +static const int mt7623_pcm_sync_4_funcs[] = { 3, }; +static const int mt7623_pcm_sync_5_pins[] = { 192, }; +static const int mt7623_pcm_sync_5_funcs[] = { 3, }; +static const int mt7623_pcm_sync_6_pins[] = { 197, }; +static const int mt7623_pcm_sync_6_funcs[] = { 3, }; +static const int mt7623_pcm_rx_0_pins[] = { 20, }; +static const int mt7623_pcm_rx_0_funcs[] = { 1, }; +static const int mt7623_pcm_rx_1_pins[] = { 16, }; +static const int mt7623_pcm_rx_1_funcs[] = { 3, }; +static const int mt7623_pcm_rx_2_pins[] = { 34, }; +static const int mt7623_pcm_rx_2_funcs[] = { 3, }; +static const int mt7623_pcm_rx_3_pins[] = { 51, }; +static const int mt7623_pcm_rx_3_funcs[] = { 3, }; +static const int mt7623_pcm_rx_4_pins[] = { 72, }; +static const int mt7623_pcm_rx_4_funcs[] = { 3, }; +static const int mt7623_pcm_rx_5_pins[] = { 190, }; +static const int mt7623_pcm_rx_5_funcs[] = { 3, }; +static const int mt7623_pcm_rx_6_pins[] = { 195, }; +static const int mt7623_pcm_rx_6_funcs[] = { 3, }; +static const int mt7623_pcm_tx_0_pins[] = { 21, }; +static const int mt7623_pcm_tx_0_funcs[] = { 1, }; +static const int mt7623_pcm_tx_1_pins[] = { 32, }; +static const int mt7623_pcm_tx_1_funcs[] = { 3, }; +static const int mt7623_pcm_tx_2_pins[] = { 33, }; +static const int mt7623_pcm_tx_2_funcs[] = { 3, }; +static const int mt7623_pcm_tx_3_pins[] = { 38, }; +static const int mt7623_pcm_tx_3_funcs[] = { 3, }; +static const int mt7623_pcm_tx_4_pins[] = { 49, }; +static const int mt7623_pcm_tx_4_funcs[] = { 3, }; +static const int mt7623_pcm_tx_5_pins[] = { 189, }; +static const int mt7623_pcm_tx_5_funcs[] = { 3, }; +static const int mt7623_pcm_tx_6_pins[] = { 194, }; +static const int mt7623_pcm_tx_6_funcs[] = { 3, }; /* PWM */ -static int mt7623_pwm_ch1_0_pins[] = { 203, }; -static int mt7623_pwm_ch1_0_funcs[] = { 1, }; -static int mt7623_pwm_ch1_1_pins[] = { 208, }; -static int mt7623_pwm_ch1_1_funcs[] = { 2, }; -static int mt7623_pwm_ch1_2_pins[] = { 72, }; -static int mt7623_pwm_ch1_2_funcs[] = { 4, }; -static int mt7623_pwm_ch1_3_pins[] = { 88, }; -static int mt7623_pwm_ch1_3_funcs[] = { 3, }; -static int mt7623_pwm_ch1_4_pins[] = { 108, }; -static int mt7623_pwm_ch1_4_funcs[] = { 3, }; -static int mt7623_pwm_ch2_0_pins[] = { 204, }; -static int mt7623_pwm_ch2_0_funcs[] = { 1, }; -static int mt7623_pwm_ch2_1_pins[] = { 53, }; -static int mt7623_pwm_ch2_1_funcs[] = { 5, }; -static int mt7623_pwm_ch2_2_pins[] = { 88, }; -static int mt7623_pwm_ch2_2_funcs[] = { 6, }; -static int mt7623_pwm_ch2_3_pins[] = { 108, }; -static int mt7623_pwm_ch2_3_funcs[] = { 6, }; -static int mt7623_pwm_ch2_4_pins[] = { 209, }; -static int mt7623_pwm_ch2_4_funcs[] = { 5, }; -static int mt7623_pwm_ch3_0_pins[] = { 205, }; -static int mt7623_pwm_ch3_0_funcs[] = { 1, }; -static int mt7623_pwm_ch3_1_pins[] = { 55, }; -static int mt7623_pwm_ch3_1_funcs[] = { 5, }; -static int mt7623_pwm_ch3_2_pins[] = { 89, }; -static int mt7623_pwm_ch3_2_funcs[] = { 6, }; -static int mt7623_pwm_ch3_3_pins[] = { 109, }; -static int mt7623_pwm_ch3_3_funcs[] = { 6, }; -static int mt7623_pwm_ch4_0_pins[] = { 206, }; -static int mt7623_pwm_ch4_0_funcs[] = { 1, }; -static int mt7623_pwm_ch4_1_pins[] = { 90, }; -static int mt7623_pwm_ch4_1_funcs[] = { 6, }; -static int mt7623_pwm_ch4_2_pins[] = { 110, }; -static int mt7623_pwm_ch4_2_funcs[] = { 6, }; -static int mt7623_pwm_ch4_3_pins[] = { 124, }; -static int mt7623_pwm_ch4_3_funcs[] = { 5, }; -static int mt7623_pwm_ch5_0_pins[] = { 207, }; -static int mt7623_pwm_ch5_0_funcs[] = { 1, }; -static int mt7623_pwm_ch5_1_pins[] = { 125, }; -static int mt7623_pwm_ch5_1_funcs[] = { 5, }; +static const int mt7623_pwm_ch1_0_pins[] = { 203, }; +static const int mt7623_pwm_ch1_0_funcs[] = { 1, }; +static const int mt7623_pwm_ch1_1_pins[] = { 208, }; +static const int mt7623_pwm_ch1_1_funcs[] = { 2, }; +static const int mt7623_pwm_ch1_2_pins[] = { 72, }; +static const int mt7623_pwm_ch1_2_funcs[] = { 4, }; +static const int mt7623_pwm_ch1_3_pins[] = { 88, }; +static const int mt7623_pwm_ch1_3_funcs[] = { 3, }; +static const int mt7623_pwm_ch1_4_pins[] = { 108, }; +static const int mt7623_pwm_ch1_4_funcs[] = { 3, }; +static const int mt7623_pwm_ch2_0_pins[] = { 204, }; +static const int mt7623_pwm_ch2_0_funcs[] = { 1, }; +static const int mt7623_pwm_ch2_1_pins[] = { 53, }; +static const int mt7623_pwm_ch2_1_funcs[] = { 5, }; +static const int mt7623_pwm_ch2_2_pins[] = { 88, }; +static const int mt7623_pwm_ch2_2_funcs[] = { 6, }; +static const int mt7623_pwm_ch2_3_pins[] = { 108, }; +static const int mt7623_pwm_ch2_3_funcs[] = { 6, }; +static const int mt7623_pwm_ch2_4_pins[] = { 209, }; +static const int mt7623_pwm_ch2_4_funcs[] = { 5, }; +static const int mt7623_pwm_ch3_0_pins[] = { 205, }; +static const int mt7623_pwm_ch3_0_funcs[] = { 1, }; +static const int mt7623_pwm_ch3_1_pins[] = { 55, }; +static const int mt7623_pwm_ch3_1_funcs[] = { 5, }; +static const int mt7623_pwm_ch3_2_pins[] = { 89, }; +static const int mt7623_pwm_ch3_2_funcs[] = { 6, }; +static const int mt7623_pwm_ch3_3_pins[] = { 109, }; +static const int mt7623_pwm_ch3_3_funcs[] = { 6, }; +static const int mt7623_pwm_ch4_0_pins[] = { 206, }; +static const int mt7623_pwm_ch4_0_funcs[] = { 1, }; +static const int mt7623_pwm_ch4_1_pins[] = { 90, }; +static const int mt7623_pwm_ch4_1_funcs[] = { 6, }; +static const int mt7623_pwm_ch4_2_pins[] = { 110, }; +static const int mt7623_pwm_ch4_2_funcs[] = { 6, }; +static const int mt7623_pwm_ch4_3_pins[] = { 124, }; +static const int mt7623_pwm_ch4_3_funcs[] = { 5, }; +static const int mt7623_pwm_ch5_0_pins[] = { 207, }; +static const int mt7623_pwm_ch5_0_funcs[] = { 1, }; +static const int mt7623_pwm_ch5_1_pins[] = { 125, }; +static const int mt7623_pwm_ch5_1_funcs[] = { 5, }; /* PWRAP */ -static int mt7623_pwrap_pins[] = { 0, 1, 2, 3, 4, 5, 6, }; -static int mt7623_pwrap_funcs[] = { 1, 1, 1, 1, 1, 1, 1, }; +static const int mt7623_pwrap_pins[] = { 0, 1, 2, 3, 4, 5, 6, }; +static const int mt7623_pwrap_funcs[] = { 1, 1, 1, 1, 1, 1, 1, }; /* SPDIF */ -static int mt7623_spdif_in0_0_pins[] = { 56, }; -static int mt7623_spdif_in0_0_funcs[] = { 3, }; -static int mt7623_spdif_in0_1_pins[] = { 201, }; -static int mt7623_spdif_in0_1_funcs[] = { 1, }; -static int mt7623_spdif_in1_0_pins[] = { 54, }; -static int mt7623_spdif_in1_0_funcs[] = { 3, }; -static int mt7623_spdif_in1_1_pins[] = { 202, }; -static int mt7623_spdif_in1_1_funcs[] = { 1, }; -static int mt7623_spdif_out_pins[] = { 202, }; -static int mt7623_spdif_out_funcs[] = { 1, }; +static const int mt7623_spdif_in0_0_pins[] = { 56, }; +static const int mt7623_spdif_in0_0_funcs[] = { 3, }; +static const int mt7623_spdif_in0_1_pins[] = { 201, }; +static const int mt7623_spdif_in0_1_funcs[] = { 1, }; +static const int mt7623_spdif_in1_0_pins[] = { 54, }; +static const int mt7623_spdif_in1_0_funcs[] = { 3, }; +static const int mt7623_spdif_in1_1_pins[] = { 202, }; +static const int mt7623_spdif_in1_1_funcs[] = { 1, }; +static const int mt7623_spdif_out_pins[] = { 202, }; +static const int mt7623_spdif_out_funcs[] = { 1, }; /* SPI */ -static int mt7623_spi0_pins[] = { 53, 54, 55, 56, }; -static int mt7623_spi0_funcs[] = { 1, 1, 1, 1, }; -static int mt7623_spi1_pins[] = { 7, 199, 8, 9, }; -static int mt7623_spi1_funcs[] = { 1, 1, 1, 1, }; -static int mt7623_spi2_pins[] = { 101, 104, 102, 103, }; -static int mt7623_spi2_funcs[] = { 1, 1, 1, 1, }; +static const int mt7623_spi0_pins[] = { 53, 54, 55, 56, }; +static const int mt7623_spi0_funcs[] = { 1, 1, 1, 1, }; +static const int mt7623_spi1_pins[] = { 7, 199, 8, 9, }; +static const int mt7623_spi1_funcs[] = { 1, 1, 1, 1, }; +static const int mt7623_spi2_pins[] = { 101, 104, 102, 103, }; +static const int mt7623_spi2_funcs[] = { 1, 1, 1, 1, }; /* UART */ -static int mt7623_uart0_0_txd_rxd_pins[] = { 79, 80, }; -static int mt7623_uart0_0_txd_rxd_funcs[] = { 1, 1, }; -static int mt7623_uart0_1_txd_rxd_pins[] = { 87, 88, }; -static int mt7623_uart0_1_txd_rxd_funcs[] = { 5, 5, }; -static int mt7623_uart0_2_txd_rxd_pins[] = { 107, 108, }; -static int mt7623_uart0_2_txd_rxd_funcs[] = { 5, 5, }; -static int mt7623_uart0_3_txd_rxd_pins[] = { 123, 122, }; -static int mt7623_uart0_3_txd_rxd_funcs[] = { 5, 5, }; -static int mt7623_uart0_rts_cts_pins[] = { 22, 23, }; -static int mt7623_uart0_rts_cts_funcs[] = { 1, 1, }; -static int mt7623_uart1_0_txd_rxd_pins[] = { 81, 82, }; -static int mt7623_uart1_0_txd_rxd_funcs[] = { 1, 1, }; -static int mt7623_uart1_1_txd_rxd_pins[] = { 89, 90, }; -static int mt7623_uart1_1_txd_rxd_funcs[] = { 5, 5, }; -static int mt7623_uart1_2_txd_rxd_pins[] = { 109, 110, }; -static int mt7623_uart1_2_txd_rxd_funcs[] = { 5, 5, }; -static int mt7623_uart1_rts_cts_pins[] = { 24, 25, }; -static int mt7623_uart1_rts_cts_funcs[] = { 1, 1, }; -static int mt7623_uart2_0_txd_rxd_pins[] = { 14, 15, }; -static int mt7623_uart2_0_txd_rxd_funcs[] = { 1, 1, }; -static int mt7623_uart2_1_txd_rxd_pins[] = { 200, 201, }; -static int mt7623_uart2_1_txd_rxd_funcs[] = { 6, 6, }; -static int mt7623_uart2_rts_cts_pins[] = { 242, 243, }; -static int mt7623_uart2_rts_cts_funcs[] = { 1, 1, }; -static int mt7623_uart3_txd_rxd_pins[] = { 242, 243, }; -static int mt7623_uart3_txd_rxd_funcs[] = { 2, 2, }; -static int mt7623_uart3_rts_cts_pins[] = { 26, 27, }; -static int mt7623_uart3_rts_cts_funcs[] = { 1, 1, }; +static const int mt7623_uart0_0_txd_rxd_pins[] = { 79, 80, }; +static const int mt7623_uart0_0_txd_rxd_funcs[] = { 1, 1, }; +static const int mt7623_uart0_1_txd_rxd_pins[] = { 87, 88, }; +static const int mt7623_uart0_1_txd_rxd_funcs[] = { 5, 5, }; +static const int mt7623_uart0_2_txd_rxd_pins[] = { 107, 108, }; +static const int mt7623_uart0_2_txd_rxd_funcs[] = { 5, 5, }; +static const int mt7623_uart0_3_txd_rxd_pins[] = { 123, 122, }; +static const int mt7623_uart0_3_txd_rxd_funcs[] = { 5, 5, }; +static const int mt7623_uart0_rts_cts_pins[] = { 22, 23, }; +static const int mt7623_uart0_rts_cts_funcs[] = { 1, 1, }; +static const int mt7623_uart1_0_txd_rxd_pins[] = { 81, 82, }; +static const int mt7623_uart1_0_txd_rxd_funcs[] = { 1, 1, }; +static const int mt7623_uart1_1_txd_rxd_pins[] = { 89, 90, }; +static const int mt7623_uart1_1_txd_rxd_funcs[] = { 5, 5, }; +static const int mt7623_uart1_2_txd_rxd_pins[] = { 109, 110, }; +static const int mt7623_uart1_2_txd_rxd_funcs[] = { 5, 5, }; +static const int mt7623_uart1_rts_cts_pins[] = { 24, 25, }; +static const int mt7623_uart1_rts_cts_funcs[] = { 1, 1, }; +static const int mt7623_uart2_0_txd_rxd_pins[] = { 14, 15, }; +static const int mt7623_uart2_0_txd_rxd_funcs[] = { 1, 1, }; +static const int mt7623_uart2_1_txd_rxd_pins[] = { 200, 201, }; +static const int mt7623_uart2_1_txd_rxd_funcs[] = { 6, 6, }; +static const int mt7623_uart2_rts_cts_pins[] = { 242, 243, }; +static const int mt7623_uart2_rts_cts_funcs[] = { 1, 1, }; +static const int mt7623_uart3_txd_rxd_pins[] = { 242, 243, }; +static const int mt7623_uart3_txd_rxd_funcs[] = { 2, 2, }; +static const int mt7623_uart3_rts_cts_pins[] = { 26, 27, }; +static const int mt7623_uart3_rts_cts_funcs[] = { 1, 1, }; /* Watchdog */ -static int mt7623_watchdog_0_pins[] = { 11, }; -static int mt7623_watchdog_0_funcs[] = { 1, }; -static int mt7623_watchdog_1_pins[] = { 121, }; -static int mt7623_watchdog_1_funcs[] = { 5, }; +static const int mt7623_watchdog_0_pins[] = { 11, }; +static const int mt7623_watchdog_0_funcs[] = { 1, }; +static const int mt7623_watchdog_1_pins[] = { 121, }; +static const int mt7623_watchdog_1_funcs[] = { 5, }; static const struct mtk_group_desc mt7623_groups[] = { PINCTRL_PIN_GROUP("aud_ext_clk0", mt7623_aud_ext_clk0), @@ -1362,7 +1362,7 @@ static const struct mtk_function_desc mt7623_functions[] = { {"watchdog", mt7623_wdt_groups, ARRAY_SIZE(mt7623_wdt_groups)}, }; -static struct mtk_pinctrl_soc mt7623_data = { +static const struct mtk_pinctrl_soc mt7623_data = { .name = "mt7623_pinctrl", .reg_cal = mt7623_reg_cals, .pins = mt7623_pins, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7629.c b/drivers/pinctrl/mediatek/pinctrl-mt7629.c index 5d4bec2..45d4def 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7629.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7629.c @@ -180,118 +180,118 @@ static const struct mtk_pin_desc mt7629_pins[] = { */ /* WF 5G */ -static int mt7629_wf0_5g_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, }; -static int mt7629_wf0_5g_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; +static const int mt7629_wf0_5g_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, }; +static const int mt7629_wf0_5g_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; /* LED for EPHY */ -static int mt7629_ephy_leds_pins[] = { 12, 13, 14, 15, 16, 17, 18, }; -static int mt7629_ephy_leds_funcs[] = { 1, 1, 1, 1, 1, 1, 1, }; -static int mt7629_ephy_led0_pins[] = { 12, }; -static int mt7629_ephy_led0_funcs[] = { 1, }; -static int mt7629_ephy_led1_pins[] = { 13, }; -static int mt7629_ephy_led1_funcs[] = { 1, }; -static int mt7629_ephy_led2_pins[] = { 14, }; -static int mt7629_ephy_led2_funcs[] = { 1, }; -static int mt7629_ephy_led3_pins[] = { 15, }; -static int mt7629_ephy_led3_funcs[] = { 1, }; -static int mt7629_ephy_led4_pins[] = { 16, }; -static int mt7629_ephy_led4_funcs[] = { 1, }; -static int mt7629_wf2g_led_pins[] = { 17, }; -static int mt7629_wf2g_led_funcs[] = { 1, }; -static int mt7629_wf5g_led_pins[] = { 18, }; -static int mt7629_wf5g_led_funcs[] = { 1, }; +static const int mt7629_ephy_leds_pins[] = { 12, 13, 14, 15, 16, 17, 18, }; +static const int mt7629_ephy_leds_funcs[] = { 1, 1, 1, 1, 1, 1, 1, }; +static const int mt7629_ephy_led0_pins[] = { 12, }; +static const int mt7629_ephy_led0_funcs[] = { 1, }; +static const int mt7629_ephy_led1_pins[] = { 13, }; +static const int mt7629_ephy_led1_funcs[] = { 1, }; +static const int mt7629_ephy_led2_pins[] = { 14, }; +static const int mt7629_ephy_led2_funcs[] = { 1, }; +static const int mt7629_ephy_led3_pins[] = { 15, }; +static const int mt7629_ephy_led3_funcs[] = { 1, }; +static const int mt7629_ephy_led4_pins[] = { 16, }; +static const int mt7629_ephy_led4_funcs[] = { 1, }; +static const int mt7629_wf2g_led_pins[] = { 17, }; +static const int mt7629_wf2g_led_funcs[] = { 1, }; +static const int mt7629_wf5g_led_pins[] = { 18, }; +static const int mt7629_wf5g_led_funcs[] = { 1, }; /* LED for EPHY used as JTAG */ -static int mt7629_ephy_leds_jtag_pins[] = { 12, 13, 14, 15, 16, }; -static int mt7629_ephy_leds_jtag_funcs[] = { 7, 7, 7, 7, 7, }; +static const int mt7629_ephy_leds_jtag_pins[] = { 12, 13, 14, 15, 16, }; +static const int mt7629_ephy_leds_jtag_funcs[] = { 7, 7, 7, 7, 7, }; /* Watchdog */ -static int mt7629_watchdog_pins[] = { 11, }; -static int mt7629_watchdog_funcs[] = { 1, }; +static const int mt7629_watchdog_pins[] = { 11, }; +static const int mt7629_watchdog_funcs[] = { 1, }; /* LED for GPHY */ -static int mt7629_gphy_leds_0_pins[] = { 21, 22, 23, }; -static int mt7629_gphy_leds_0_funcs[] = { 2, 2, 2, }; -static int mt7629_gphy_led1_0_pins[] = { 21, }; -static int mt7629_gphy_led1_0_funcs[] = { 2, }; -static int mt7629_gphy_led2_0_pins[] = { 22, }; -static int mt7629_gphy_led2_0_funcs[] = { 2, }; -static int mt7629_gphy_led3_0_pins[] = { 23, }; -static int mt7629_gphy_led3_0_funcs[] = { 2, }; -static int mt7629_gphy_leds_1_pins[] = { 57, 58, 59, }; -static int mt7629_gphy_leds_1_funcs[] = { 1, 1, 1, }; -static int mt7629_gphy_led1_1_pins[] = { 57, }; -static int mt7629_gphy_led1_1_funcs[] = { 1, }; -static int mt7629_gphy_led2_1_pins[] = { 58, }; -static int mt7629_gphy_led2_1_funcs[] = { 1, }; -static int mt7629_gphy_led3_1_pins[] = { 59, }; -static int mt7629_gphy_led3_1_funcs[] = { 1, }; +static const int mt7629_gphy_leds_0_pins[] = { 21, 22, 23, }; +static const int mt7629_gphy_leds_0_funcs[] = { 2, 2, 2, }; +static const int mt7629_gphy_led1_0_pins[] = { 21, }; +static const int mt7629_gphy_led1_0_funcs[] = { 2, }; +static const int mt7629_gphy_led2_0_pins[] = { 22, }; +static const int mt7629_gphy_led2_0_funcs[] = { 2, }; +static const int mt7629_gphy_led3_0_pins[] = { 23, }; +static const int mt7629_gphy_led3_0_funcs[] = { 2, }; +static const int mt7629_gphy_leds_1_pins[] = { 57, 58, 59, }; +static const int mt7629_gphy_leds_1_funcs[] = { 1, 1, 1, }; +static const int mt7629_gphy_led1_1_pins[] = { 57, }; +static const int mt7629_gphy_led1_1_funcs[] = { 1, }; +static const int mt7629_gphy_led2_1_pins[] = { 58, }; +static const int mt7629_gphy_led2_1_funcs[] = { 1, }; +static const int mt7629_gphy_led3_1_pins[] = { 59, }; +static const int mt7629_gphy_led3_1_funcs[] = { 1, }; /* I2C */ -static int mt7629_i2c_0_pins[] = { 19, 20, }; -static int mt7629_i2c_0_funcs[] = { 1, 1, }; -static int mt7629_i2c_1_pins[] = { 53, 54, }; -static int mt7629_i2c_1_funcs[] = { 1, 1, }; +static const int mt7629_i2c_0_pins[] = { 19, 20, }; +static const int mt7629_i2c_0_funcs[] = { 1, 1, }; +static const int mt7629_i2c_1_pins[] = { 53, 54, }; +static const int mt7629_i2c_1_funcs[] = { 1, 1, }; /* SPI */ -static int mt7629_spi_0_pins[] = { 21, 22, 23, 24, }; -static int mt7629_spi_0_funcs[] = { 1, 1, 1, 1, }; -static int mt7629_spi_1_pins[] = { 62, 63, 64, 65, }; -static int mt7629_spi_1_funcs[] = { 1, 1, 1, 1, }; -static int mt7629_spi_wp_pins[] = { 66, }; -static int mt7629_spi_wp_funcs[] = { 1, }; -static int mt7629_spi_hold_pins[] = { 67, }; -static int mt7629_spi_hold_funcs[] = { 1, }; +static const int mt7629_spi_0_pins[] = { 21, 22, 23, 24, }; +static const int mt7629_spi_0_funcs[] = { 1, 1, 1, 1, }; +static const int mt7629_spi_1_pins[] = { 62, 63, 64, 65, }; +static const int mt7629_spi_1_funcs[] = { 1, 1, 1, 1, }; +static const int mt7629_spi_wp_pins[] = { 66, }; +static const int mt7629_spi_wp_funcs[] = { 1, }; +static const int mt7629_spi_hold_pins[] = { 67, }; +static const int mt7629_spi_hold_funcs[] = { 1, }; /* UART */ -static int mt7629_uart1_0_txd_rxd_pins[] = { 25, 26, }; -static int mt7629_uart1_0_txd_rxd_funcs[] = { 1, 1, }; -static int mt7629_uart1_1_txd_rxd_pins[] = { 53, 54, }; -static int mt7629_uart1_1_txd_rxd_funcs[] = { 2, 2, }; -static int mt7629_uart2_0_txd_rxd_pins[] = { 29, 30, }; -static int mt7629_uart2_0_txd_rxd_funcs[] = { 1, 1, }; -static int mt7629_uart2_1_txd_rxd_pins[] = { 57, 58, }; -static int mt7629_uart2_1_txd_rxd_funcs[] = { 2, 2, }; -static int mt7629_uart1_0_cts_rts_pins[] = { 27, 28, }; -static int mt7629_uart1_0_cts_rts_funcs[] = { 1, 1, }; -static int mt7629_uart1_1_cts_rts_pins[] = { 55, 56, }; -static int mt7629_uart1_1_cts_rts_funcs[] = { 2, 2, }; -static int mt7629_uart2_0_cts_rts_pins[] = { 31, 32, }; -static int mt7629_uart2_0_cts_rts_funcs[] = { 1, 1, }; -static int mt7629_uart2_1_cts_rts_pins[] = { 59, 60, }; -static int mt7629_uart2_1_cts_rts_funcs[] = { 2, 2, }; -static int mt7629_uart0_txd_rxd_pins[] = { 68, 69, }; -static int mt7629_uart0_txd_rxd_funcs[] = { 1, 1, }; +static const int mt7629_uart1_0_txd_rxd_pins[] = { 25, 26, }; +static const int mt7629_uart1_0_txd_rxd_funcs[] = { 1, 1, }; +static const int mt7629_uart1_1_txd_rxd_pins[] = { 53, 54, }; +static const int mt7629_uart1_1_txd_rxd_funcs[] = { 2, 2, }; +static const int mt7629_uart2_0_txd_rxd_pins[] = { 29, 30, }; +static const int mt7629_uart2_0_txd_rxd_funcs[] = { 1, 1, }; +static const int mt7629_uart2_1_txd_rxd_pins[] = { 57, 58, }; +static const int mt7629_uart2_1_txd_rxd_funcs[] = { 2, 2, }; +static const int mt7629_uart1_0_cts_rts_pins[] = { 27, 28, }; +static const int mt7629_uart1_0_cts_rts_funcs[] = { 1, 1, }; +static const int mt7629_uart1_1_cts_rts_pins[] = { 55, 56, }; +static const int mt7629_uart1_1_cts_rts_funcs[] = { 2, 2, }; +static const int mt7629_uart2_0_cts_rts_pins[] = { 31, 32, }; +static const int mt7629_uart2_0_cts_rts_funcs[] = { 1, 1, }; +static const int mt7629_uart2_1_cts_rts_pins[] = { 59, 60, }; +static const int mt7629_uart2_1_cts_rts_funcs[] = { 2, 2, }; +static const int mt7629_uart0_txd_rxd_pins[] = { 68, 69, }; +static const int mt7629_uart0_txd_rxd_funcs[] = { 1, 1, }; /* MDC/MDIO */ -static int mt7629_mdc_mdio_pins[] = { 49, 50, }; -static int mt7629_mdc_mdio_funcs[] = { 1, 1, }; +static const int mt7629_mdc_mdio_pins[] = { 49, 50, }; +static const int mt7629_mdc_mdio_funcs[] = { 1, 1, }; /* PCIE */ -static int mt7629_pcie_pereset_pins[] = { 51, }; -static int mt7629_pcie_pereset_funcs[] = { 1, }; -static int mt7629_pcie_wake_pins[] = { 55, }; -static int mt7629_pcie_wake_funcs[] = { 1, }; -static int mt7629_pcie_clkreq_pins[] = { 56, }; -static int mt7629_pcie_clkreq_funcs[] = { 1, }; +static const int mt7629_pcie_pereset_pins[] = { 51, }; +static const int mt7629_pcie_pereset_funcs[] = { 1, }; +static const int mt7629_pcie_wake_pins[] = { 55, }; +static const int mt7629_pcie_wake_funcs[] = { 1, }; +static const int mt7629_pcie_clkreq_pins[] = { 56, }; +static const int mt7629_pcie_clkreq_funcs[] = { 1, }; /* PWM */ -static int mt7629_pwm_0_pins[] = { 52, }; -static int mt7629_pwm_0_funcs[] = { 1, }; -static int mt7629_pwm_1_pins[] = { 61, }; -static int mt7629_pwm_1_funcs[] = { 2, }; +static const int mt7629_pwm_0_pins[] = { 52, }; +static const int mt7629_pwm_0_funcs[] = { 1, }; +static const int mt7629_pwm_1_pins[] = { 61, }; +static const int mt7629_pwm_1_funcs[] = { 2, }; /* WF 2G */ -static int mt7629_wf0_2g_pins[] = { 70, 71, 72, 73, 74, 75, 76, 77, 78, }; -static int mt7629_wf0_2g_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, }; +static const int mt7629_wf0_2g_pins[] = { 70, 71, 72, 73, 74, 75, 76, 77, 78, }; +static const int mt7629_wf0_2g_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, }; /* SNFI */ -static int mt7629_snfi_pins[] = { 62, 63, 64, 65, 66, 67 }; -static int mt7629_snfi_funcs[] = { 2, 2, 2, 2, 2, 2 }; +static const int mt7629_snfi_pins[] = { 62, 63, 64, 65, 66, 67 }; +static const int mt7629_snfi_funcs[] = { 2, 2, 2, 2, 2, 2 }; /* SPI NOR */ -static int mt7629_snor_pins[] = { 62, 63, 64, 65, 66, 67 }; -static int mt7629_snor_funcs[] = { 1, 1, 1, 1, 1, 1 }; +static const int mt7629_snor_pins[] = { 62, 63, 64, 65, 66, 67 }; +static const int mt7629_snor_funcs[] = { 1, 1, 1, 1, 1, 1 }; static const struct mtk_group_desc mt7629_groups[] = { PINCTRL_PIN_GROUP("wf0_5g", mt7629_wf0_5g), @@ -385,7 +385,7 @@ static const struct mtk_function_desc mt7629_functions[] = { {"jtag", mt7629_jtag_groups, ARRAY_SIZE(mt7629_jtag_groups)}, }; -static struct mtk_pinctrl_soc mt7629_data = { +static const struct mtk_pinctrl_soc mt7629_data = { .name = "mt7629_pinctrl", .reg_cal = mt7629_reg_cals, .pins = mt7629_pins, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7981.c b/drivers/pinctrl/mediatek/pinctrl-mt7981.c index d887524..3fa198e 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7981.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7981.c @@ -570,242 +570,246 @@ static const struct mtk_pin_desc mt7981_pins[] = { }; /* WA_AICE */ -static int mt7981_wa_aice1_pins[] = { 0, 1, }; -static int mt7981_wa_aice1_funcs[] = { 2, 2, }; +static const int mt7981_wa_aice1_pins[] = { 0, 1, }; +static const int mt7981_wa_aice1_funcs[] = { 2, 2, }; -static int mt7981_wa_aice2_pins[] = { 0, 1, }; -static int mt7981_wa_aice2_funcs[] = { 3, 3, }; +static const int mt7981_wa_aice2_pins[] = { 0, 1, }; +static const int mt7981_wa_aice2_funcs[] = { 3, 3, }; -static int mt7981_wa_aice3_pins[] = { 28, 29, }; -static int mt7981_wa_aice3_funcs[] = { 3, 3, }; +static const int mt7981_wa_aice3_pins[] = { 28, 29, }; +static const int mt7981_wa_aice3_funcs[] = { 3, 3, }; -static int mt7981_wm_aice1_pins[] = { 9, 10, }; -static int mt7981_wm_aice1_funcs[] = { 2, 2, }; +static const int mt7981_wm_aice1_pins[] = { 9, 10, }; +static const int mt7981_wm_aice1_funcs[] = { 2, 2, }; -static int mt7981_wm_aice2_pins[] = { 30, 31, }; -static int mt7981_wm_aice2_funcs[] = { 5, 5, }; +static const int mt7981_wm_aice2_pins[] = { 30, 31, }; +static const int mt7981_wm_aice2_funcs[] = { 5, 5, }; /* WM_UART */ -static int mt7981_wm_uart_0_pins[] = { 0, 1, }; -static int mt7981_wm_uart_0_funcs[] = { 5, 5, }; +static const int mt7981_wm_uart_0_pins[] = { 0, 1, }; +static const int mt7981_wm_uart_0_funcs[] = { 5, 5, }; -static int mt7981_wm_uart_1_pins[] = { 20, 21, }; -static int mt7981_wm_uart_1_funcs[] = { 4, 4, }; +static const int mt7981_wm_uart_1_pins[] = { 20, 21, }; +static const int mt7981_wm_uart_1_funcs[] = { 4, 4, }; -static int mt7981_wm_uart_2_pins[] = { 30, 31, }; -static int mt7981_wm_uart_2_funcs[] = { 3, 3, }; +static const int mt7981_wm_uart_2_pins[] = { 30, 31, }; +static const int mt7981_wm_uart_2_funcs[] = { 3, 3, }; /* DFD */ -static int mt7981_dfd_pins[] = { 0, 1, 4, 5, }; -static int mt7981_dfd_funcs[] = { 5, 5, 6, 6, }; +static const int mt7981_dfd_pins[] = { 0, 1, 4, 5, }; +static const int mt7981_dfd_funcs[] = { 5, 5, 6, 6, }; /* SYS_WATCHDOG */ -static int mt7981_watchdog_pins[] = { 2, }; -static int mt7981_watchdog_funcs[] = { 1, }; +static const int mt7981_watchdog_pins[] = { 2, }; +static const int mt7981_watchdog_funcs[] = { 1, }; -static int mt7981_watchdog1_pins[] = { 13, }; -static int mt7981_watchdog1_funcs[] = { 5, }; +static const int mt7981_watchdog1_pins[] = { 13, }; +static const int mt7981_watchdog1_funcs[] = { 5, }; /* PCIE_PERESET_N */ -static int mt7981_pcie_pereset_pins[] = { 3, }; -static int mt7981_pcie_pereset_funcs[] = { 1, }; +static const int mt7981_pcie_pereset_pins[] = { 3, }; +static const int mt7981_pcie_pereset_funcs[] = { 1, }; /* JTAG */ -static int mt7981_jtag_pins[] = { 4, 5, 6, 7, 8, }; -static int mt7981_jtag_funcs[] = { 1, 1, 1, 1, 1, }; +static const int mt7981_jtag_pins[] = { 4, 5, 6, 7, 8, }; +static const int mt7981_jtag_funcs[] = { 1, 1, 1, 1, 1, }; /* WM_JTAG */ -static int mt7981_wm_jtag_0_pins[] = { 4, 5, 6, 7, 8, }; -static int mt7981_wm_jtag_0_funcs[] = { 2, 2, 2, 2, 2, }; +static const int mt7981_wm_jtag_0_pins[] = { 4, 5, 6, 7, 8, }; +static const int mt7981_wm_jtag_0_funcs[] = { 2, 2, 2, 2, 2, }; -static int mt7981_wm_jtag_1_pins[] = { 20, 21, 22, 23, 24, }; -static int mt7981_wm_jtag_1_funcs[] = { 5, 5, 5, 5, 5, }; +static const int mt7981_wm_jtag_1_pins[] = { 20, 21, 22, 23, 24, }; +static const int mt7981_wm_jtag_1_funcs[] = { 5, 5, 5, 5, 5, }; /* WO0_JTAG */ -static int mt7981_wo0_jtag_0_pins[] = { 9, 10, 11, 12, 13, }; -static int mt7981_wo0_jtag_0_funcs[] = { 1, 1, 1, 1, 1, }; +static const int mt7981_wo0_jtag_0_pins[] = { 9, 10, 11, 12, 13, }; +static const int mt7981_wo0_jtag_0_funcs[] = { 1, 1, 1, 1, 1, }; -static int mt7981_wo0_jtag_1_pins[] = { 25, 26, 27, 28, 29, }; -static int mt7981_wo0_jtag_1_funcs[] = { 5, 5, 5, 5, 5, }; +static const int mt7981_wo0_jtag_1_pins[] = { 25, 26, 27, 28, 29, }; +static const int mt7981_wo0_jtag_1_funcs[] = { 5, 5, 5, 5, 5, }; /* UART2 */ -static int mt7981_uart2_0_pins[] = { 4, 5, 6, 7, }; -static int mt7981_uart2_0_funcs[] = { 3, 3, 3, 3, }; +static const int mt7981_uart2_0_pins[] = { 4, 5, 6, 7, }; +static const int mt7981_uart2_0_funcs[] = { 3, 3, 3, 3, }; /* GBE_LED0 */ -static int mt7981_gbe_led0_pins[] = { 8, }; -static int mt7981_gbe_led0_funcs[] = { 3, }; +static const int mt7981_gbe_led0_pins[] = { 8, }; +static const int mt7981_gbe_led0_funcs[] = { 3, }; /* PTA_EXT */ -static int mt7981_pta_ext_0_pins[] = { 4, 5, 6, }; -static int mt7981_pta_ext_0_funcs[] = { 4, 4, 4, }; +static const int mt7981_pta_ext_0_pins[] = { 4, 5, 6, }; +static const int mt7981_pta_ext_0_funcs[] = { 4, 4, 4, }; -static int mt7981_pta_ext_1_pins[] = { 22, 23, 24, }; -static int mt7981_pta_ext_1_funcs[] = { 4, 4, 4, }; +static const int mt7981_pta_ext_1_pins[] = { 22, 23, 24, }; +static const int mt7981_pta_ext_1_funcs[] = { 4, 4, 4, }; /* PWM2 */ -static int mt7981_pwm2_pins[] = { 7, }; -static int mt7981_pwm2_funcs[] = { 4, }; +static const int mt7981_pwm2_pins[] = { 7, }; +static const int mt7981_pwm2_funcs[] = { 4, }; /* NET_WO0_UART_TXD */ -static int mt7981_net_wo0_uart_txd_0_pins[] = { 8, }; -static int mt7981_net_wo0_uart_txd_0_funcs[] = { 4, }; +static const int mt7981_net_wo0_uart_txd_0_pins[] = { 8, }; +static const int mt7981_net_wo0_uart_txd_0_funcs[] = { 4, }; -static int mt7981_net_wo0_uart_txd_1_pins[] = { 14, }; -static int mt7981_net_wo0_uart_txd_1_funcs[] = { 3, }; +static const int mt7981_net_wo0_uart_txd_1_pins[] = { 14, }; +static const int mt7981_net_wo0_uart_txd_1_funcs[] = { 3, }; -static int mt7981_net_wo0_uart_txd_2_pins[] = { 15, }; -static int mt7981_net_wo0_uart_txd_2_funcs[] = { 4, }; +static const int mt7981_net_wo0_uart_txd_2_pins[] = { 15, }; +static const int mt7981_net_wo0_uart_txd_2_funcs[] = { 4, }; /* SPI1 */ -static int mt7981_spi1_0_pins[] = { 4, 5, 6, 7, }; -static int mt7981_spi1_0_funcs[] = { 5, 5, 5, 5, }; +static const int mt7981_spi1_0_pins[] = { 4, 5, 6, 7, }; +static const int mt7981_spi1_0_funcs[] = { 5, 5, 5, 5, }; /* I2C */ -static int mt7981_i2c0_0_pins[] = { 6, 7, }; -static int mt7981_i2c0_0_funcs[] = { 6, 6, }; +static const int mt7981_i2c0_0_pins[] = { 6, 7, }; +static const int mt7981_i2c0_0_funcs[] = { 6, 6, }; -static int mt7981_i2c0_1_pins[] = { 30, 31, }; -static int mt7981_i2c0_1_funcs[] = { 4, 4, }; +static const int mt7981_i2c0_1_pins[] = { 30, 31, }; +static const int mt7981_i2c0_1_funcs[] = { 4, 4, }; -static int mt7981_i2c0_2_pins[] = { 36, 37, }; -static int mt7981_i2c0_2_funcs[] = { 2, 2, }; +static const int mt7981_i2c0_2_pins[] = { 36, 37, }; +static const int mt7981_i2c0_2_funcs[] = { 2, 2, }; -static int mt7981_u2_phy_i2c_pins[] = { 30, 31, }; -static int mt7981_u2_phy_i2c_funcs[] = { 6, 6, }; +static const int mt7981_u2_phy_i2c_pins[] = { 30, 31, }; +static const int mt7981_u2_phy_i2c_funcs[] = { 6, 6, }; -static int mt7981_u3_phy_i2c_pins[] = { 32, 33, }; -static int mt7981_u3_phy_i2c_funcs[] = { 3, 3, }; +static const int mt7981_u3_phy_i2c_pins[] = { 32, 33, }; +static const int mt7981_u3_phy_i2c_funcs[] = { 3, 3, }; -static int mt7981_sgmii1_phy_i2c_pins[] = { 32, 33, }; -static int mt7981_sgmii1_phy_i2c_funcs[] = { 2, 2, }; +static const int mt7981_sgmii1_phy_i2c_pins[] = { 32, 33, }; +static const int mt7981_sgmii1_phy_i2c_funcs[] = { 2, 2, }; -static int mt7981_sgmii0_phy_i2c_pins[] = { 32, 33, }; -static int mt7981_sgmii0_phy_i2c_funcs[] = { 5, 5, }; +static const int mt7981_sgmii0_phy_i2c_pins[] = { 32, 33, }; +static const int mt7981_sgmii0_phy_i2c_funcs[] = { 5, 5, }; /* DFD_NTRST */ -static int mt7981_dfd_ntrst_pins[] = { 8, }; -static int mt7981_dfd_ntrst_funcs[] = { 6, }; +static const int mt7981_dfd_ntrst_pins[] = { 8, }; +static const int mt7981_dfd_ntrst_funcs[] = { 6, }; /* PWM0 */ -static int mt7981_pwm0_0_pins[] = { 13, }; -static int mt7981_pwm0_0_funcs[] = { 2, }; +static const int mt7981_pwm0_0_pins[] = { 13, }; +static const int mt7981_pwm0_0_funcs[] = { 2, }; -static int mt7981_pwm0_1_pins[] = { 15, }; -static int mt7981_pwm0_1_funcs[] = { 1, }; +static const int mt7981_pwm0_1_pins[] = { 15, }; +static const int mt7981_pwm0_1_funcs[] = { 1, }; /* PWM1 */ -static int mt7981_pwm1_0_pins[] = { 14, }; -static int mt7981_pwm1_0_funcs[] = { 2, }; +static const int mt7981_pwm1_0_pins[] = { 14, }; +static const int mt7981_pwm1_0_funcs[] = { 2, }; -static int mt7981_pwm1_1_pins[] = { 15, }; -static int mt7981_pwm1_1_funcs[] = { 3, }; +static const int mt7981_pwm1_1_pins[] = { 15, }; +static const int mt7981_pwm1_1_funcs[] = { 3, }; /* GBE_LED1 */ -static int mt7981_gbe_led1_pins[] = { 13, }; -static int mt7981_gbe_led1_funcs[] = { 3, }; +static const int mt7981_gbe_led1_pins[] = { 13, }; +static const int mt7981_gbe_led1_funcs[] = { 3, }; /* PCM */ -static int mt7981_pcm_pins[] = { 9, 10, 11, 12, 13, 25 }; -static int mt7981_pcm_funcs[] = { 4, 4, 4, 4, 4, 4, }; +static const int mt7981_pcm_pins[] = { 9, 10, 11, 12, 13, 25 }; +static const int mt7981_pcm_funcs[] = { 4, 4, 4, 4, 4, 4, }; /* UDI */ -static int mt7981_udi_pins[] = { 9, 10, 11, 12, 13, }; -static int mt7981_udi_funcs[] = { 6, 6, 6, 6, 6, }; +static const int mt7981_udi_pins[] = { 9, 10, 11, 12, 13, }; +static const int mt7981_udi_funcs[] = { 6, 6, 6, 6, 6, }; /* DRV_VBUS */ -static int mt7981_drv_vbus_pins[] = { 14, }; -static int mt7981_drv_vbus_funcs[] = { 1, }; +static const int mt7981_drv_vbus_pins[] = { 14, }; +static const int mt7981_drv_vbus_funcs[] = { 1, }; /* EMMC */ -static int mt7981_emmc_45_pins[] = { 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, }; -static int mt7981_emmc_45_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; +static const int mt7981_emmc_45_pins[] = { + 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, }; +static const int mt7981_emmc_45_funcs[] = { + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; /* SNFI */ -static int mt7981_snfi_pins[] = { 16, 17, 18, 19, 20, 21, }; -static int mt7981_snfi_funcs[] = { 3, 3, 3, 3, 3, 3, }; +static const int mt7981_snfi_pins[] = { 16, 17, 18, 19, 20, 21, }; +static const int mt7981_snfi_funcs[] = { 3, 3, 3, 3, 3, 3, }; /* SPI0 */ -static int mt7981_spi0_pins[] = { 16, 17, 18, 19, }; -static int mt7981_spi0_funcs[] = { 1, 1, 1, 1, }; +static const int mt7981_spi0_pins[] = { 16, 17, 18, 19, }; +static const int mt7981_spi0_funcs[] = { 1, 1, 1, 1, }; /* SPI0 */ -static int mt7981_spi0_wp_hold_pins[] = { 20, 21, }; -static int mt7981_spi0_wp_hold_funcs[] = { 1, 1, }; +static const int mt7981_spi0_wp_hold_pins[] = { 20, 21, }; +static const int mt7981_spi0_wp_hold_funcs[] = { 1, 1, }; /* SPI1 */ -static int mt7981_spi1_1_pins[] = { 22, 23, 24, 25, }; -static int mt7981_spi1_1_funcs[] = { 1, 1, 1, 1, }; +static const int mt7981_spi1_1_pins[] = { 22, 23, 24, 25, }; +static const int mt7981_spi1_1_funcs[] = { 1, 1, 1, 1, }; /* SPI2 */ -static int mt7981_spi2_pins[] = { 26, 27, 28, 29, }; -static int mt7981_spi2_funcs[] = { 1, 1, 1, 1, }; +static const int mt7981_spi2_pins[] = { 26, 27, 28, 29, }; +static const int mt7981_spi2_funcs[] = { 1, 1, 1, 1, }; /* SPI2 */ -static int mt7981_spi2_wp_hold_pins[] = { 30, 31, }; -static int mt7981_spi2_wp_hold_funcs[] = { 1, 1, }; +static const int mt7981_spi2_wp_hold_pins[] = { 30, 31, }; +static const int mt7981_spi2_wp_hold_funcs[] = { 1, 1, }; /* UART1 */ -static int mt7981_uart1_0_pins[] = { 16, 17, 18, 19, }; -static int mt7981_uart1_0_funcs[] = { 4, 4, 4, 4, }; +static const int mt7981_uart1_0_pins[] = { 16, 17, 18, 19, }; +static const int mt7981_uart1_0_funcs[] = { 4, 4, 4, 4, }; -static int mt7981_uart1_1_pins[] = { 26, 27, 28, 29, }; -static int mt7981_uart1_1_funcs[] = { 2, 2, 2, 2, }; +static const int mt7981_uart1_1_pins[] = { 26, 27, 28, 29, }; +static const int mt7981_uart1_1_funcs[] = { 2, 2, 2, 2, }; /* UART2 */ -static int mt7981_uart2_1_pins[] = { 22, 23, 24, 25, }; -static int mt7981_uart2_1_funcs[] = { 3, 3, 3, 3, }; +static const int mt7981_uart2_1_pins[] = { 22, 23, 24, 25, }; +static const int mt7981_uart2_1_funcs[] = { 3, 3, 3, 3, }; /* UART0 */ -static int mt7981_uart0_pins[] = { 32, 33, }; -static int mt7981_uart0_funcs[] = { 1, 1, }; +static const int mt7981_uart0_pins[] = { 32, 33, }; +static const int mt7981_uart0_funcs[] = { 1, 1, }; /* PCIE_CLK_REQ */ -static int mt7981_pcie_clk_pins[] = { 34, }; -static int mt7981_pcie_clk_funcs[] = { 2, }; +static const int mt7981_pcie_clk_pins[] = { 34, }; +static const int mt7981_pcie_clk_funcs[] = { 2, }; /* PCIE_WAKE_N */ -static int mt7981_pcie_wake_pins[] = { 35, }; -static int mt7981_pcie_wake_funcs[] = { 2, }; +static const int mt7981_pcie_wake_pins[] = { 35, }; +static const int mt7981_pcie_wake_funcs[] = { 2, }; /* MDC_MDIO */ -static int mt7981_smi_mdc_mdio_pins[] = { 36, 37, }; -static int mt7981_smi_mdc_mdio_funcs[] = { 1, 1, }; +static const int mt7981_smi_mdc_mdio_pins[] = { 36, 37, }; +static const int mt7981_smi_mdc_mdio_funcs[] = { 1, 1, }; -static int mt7981_gbe_ext_mdc_mdio_pins[] = { 36, 37, }; -static int mt7981_gbe_ext_mdc_mdio_funcs[] = { 3, 3, }; +static const int mt7981_gbe_ext_mdc_mdio_pins[] = { 36, 37, }; +static const int mt7981_gbe_ext_mdc_mdio_funcs[] = { 3, 3, }; /* WF0_MODE1 */ -static int mt7981_wf0_mode1_pins[] = { 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, - 50, 51, 52, 53, 54, 55, 56 }; -static int mt7981_wf0_mode1_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1 }; +static const int mt7981_wf0_mode1_pins[] = { + 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56 }; +static const int mt7981_wf0_mode1_funcs[] = { + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; /* WF0_MODE3 */ -static int mt7981_wf0_mode3_pins[] = { 45, 46, 47, 48, 49, 51 }; -static int mt7981_wf0_mode3_funcs[] = { 2, 2, 2, 2, 2, 2 }; +static const int mt7981_wf0_mode3_pins[] = { 45, 46, 47, 48, 49, 51 }; +static const int mt7981_wf0_mode3_funcs[] = { 2, 2, 2, 2, 2, 2 }; /* WF2G_LED */ -static int mt7981_wf2g_led0_pins[] = { 30, }; -static int mt7981_wf2g_led0_funcs[] = { 2, }; +static const int mt7981_wf2g_led0_pins[] = { 30, }; +static const int mt7981_wf2g_led0_funcs[] = { 2, }; -static int mt7981_wf2g_led1_pins[] = { 34, }; -static int mt7981_wf2g_led1_funcs[] = { 1, }; +static const int mt7981_wf2g_led1_pins[] = { 34, }; +static const int mt7981_wf2g_led1_funcs[] = { 1, }; /* WF5G_LED */ -static int mt7981_wf5g_led0_pins[] = { 31, }; -static int mt7981_wf5g_led0_funcs[] = { 2, }; +static const int mt7981_wf5g_led0_pins[] = { 31, }; +static const int mt7981_wf5g_led0_funcs[] = { 2, }; -static int mt7981_wf5g_led1_pins[] = { 35, }; -static int mt7981_wf5g_led1_funcs[] = { 1, }; +static const int mt7981_wf5g_led1_pins[] = { 35, }; +static const int mt7981_wf5g_led1_funcs[] = { 1, }; /* MT7531_INT */ -static int mt7981_mt7531_int_pins[] = { 38, }; -static int mt7981_mt7531_int_funcs[] = { 1, }; +static const int mt7981_mt7531_int_pins[] = { 38, }; +static const int mt7981_mt7531_int_funcs[] = { 1, }; /* ANT_SEL */ -static int mt7981_ant_sel_pins[] = { 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 34, 35 }; -static int mt7981_ant_sel_funcs[] = { 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6 }; +static const int mt7981_ant_sel_pins[] = { + 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 34, 35 }; +static const int mt7981_ant_sel_funcs[] = { + 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6 }; static const struct mtk_group_desc mt7981_groups[] = { /* @GPIO(0,1): WA_AICE(2) */ @@ -1012,7 +1016,7 @@ static const char *const mt7981_pinctrl_register_base_names[] = { "iocfg_lb_base", "iocfg_bl_base", "iocfg_tm_base", "iocfg_tl_base", }; -static struct mtk_pinctrl_soc mt7981_data = { +static const struct mtk_pinctrl_soc mt7981_data = { .name = "mt7981_pinctrl", .reg_cal = mt7981_reg_cals, .pins = mt7981_pins, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7986.c b/drivers/pinctrl/mediatek/pinctrl-mt7986.c index 449e5ad..819d644 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7986.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7986.c @@ -554,114 +554,117 @@ static const struct mtk_io_type_desc mt7986_io_type_desc[] = { * The hardware probably has multiple combinations of these pinouts. */ -static int mt7986_watchdog_pins[] = { 0, }; -static int mt7986_watchdog_funcs[] = { 1, }; +static const int mt7986_watchdog_pins[] = { 0, }; +static const int mt7986_watchdog_funcs[] = { 1, }; -static int mt7986_wifi_led_pins[] = { 1, 2, }; -static int mt7986_wifi_led_funcs[] = { 1, 1, }; +static const int mt7986_wifi_led_pins[] = { 1, 2, }; +static const int mt7986_wifi_led_funcs[] = { 1, 1, }; -static int mt7986_i2c_pins[] = { 3, 4, }; -static int mt7986_i2c_funcs[] = { 1, 1, }; +static const int mt7986_i2c_pins[] = { 3, 4, }; +static const int mt7986_i2c_funcs[] = { 1, 1, }; -static int mt7986_uart1_0_pins[] = { 7, 8, 9, 10, }; -static int mt7986_uart1_0_funcs[] = { 3, 3, 3, 3, }; +static const int mt7986_uart1_0_pins[] = { 7, 8, 9, 10, }; +static const int mt7986_uart1_0_funcs[] = { 3, 3, 3, 3, }; -static int mt7986_spi1_0_pins[] = { 11, 12, 13, 14, }; -static int mt7986_spi1_0_funcs[] = { 3, 3, 3, 3, }; +static const int mt7986_spi1_0_pins[] = { 11, 12, 13, 14, }; +static const int mt7986_spi1_0_funcs[] = { 3, 3, 3, 3, }; -static int mt7986_pwm1_1_pins[] = { 20, }; -static int mt7986_pwm1_1_funcs[] = { 2, }; +static const int mt7986_pwm1_1_pins[] = { 20, }; +static const int mt7986_pwm1_1_funcs[] = { 2, }; -static int mt7986_pwm0_pins[] = { 21, }; -static int mt7986_pwm0_funcs[] = { 1, }; +static const int mt7986_pwm0_pins[] = { 21, }; +static const int mt7986_pwm0_funcs[] = { 1, }; -static int mt7986_pwm1_0_pins[] = { 22, }; -static int mt7986_pwm1_0_funcs[] = { 1, }; +static const int mt7986_pwm1_0_pins[] = { 22, }; +static const int mt7986_pwm1_0_funcs[] = { 1, }; -static int mt7986_emmc_45_pins[] = { +static const int mt7986_emmc_45_pins[] = { 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, }; -static int mt7986_emmc_45_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; +static const int mt7986_emmc_45_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; -static int mt7986_snfi_pins[] = { 23, 24, 25, 26, 27, 28, }; -static int mt7986_snfi_funcs[] = { 1, 1, 1, 1, 1, 1, }; +static const int mt7986_snfi_pins[] = { 23, 24, 25, 26, 27, 28, }; +static const int mt7986_snfi_funcs[] = { 1, 1, 1, 1, 1, 1, }; -static int mt7986_spi1_1_pins[] = { 23, 24, 25, 26, }; -static int mt7986_spi1_1_funcs[] = { 3, 3, 3, 3, }; +static const int mt7986_spi1_1_pins[] = { 23, 24, 25, 26, }; +static const int mt7986_spi1_1_funcs[] = { 3, 3, 3, 3, }; -static int mt7986_uart1_1_pins[] = { 23, 24, 25, 26, }; -static int mt7986_uart1_1_funcs[] = { 4, 4, 4, 4, }; +static const int mt7986_uart1_1_pins[] = { 23, 24, 25, 26, }; +static const int mt7986_uart1_1_funcs[] = { 4, 4, 4, 4, }; -static int mt7986_spi1_2_pins[] = { 29, 30, 31, 32, }; -static int mt7986_spi1_2_funcs[] = { 1, 1, 1, 1, }; +static const int mt7986_spi1_2_pins[] = { 29, 30, 31, 32, }; +static const int mt7986_spi1_2_funcs[] = { 1, 1, 1, 1, }; -static int mt7986_uart1_2_pins[] = { 29, 30, 31, 32, }; -static int mt7986_uart1_2_funcs[] = { 3, 3, 3, 3, }; +static const int mt7986_uart1_2_pins[] = { 29, 30, 31, 32, }; +static const int mt7986_uart1_2_funcs[] = { 3, 3, 3, 3, }; -static int mt7986_uart2_0_pins[] = { 29, 30, 31, 32, }; -static int mt7986_uart2_0_funcs[] = { 4, 4, 4, 4, }; +static const int mt7986_uart2_0_pins[] = { 29, 30, 31, 32, }; +static const int mt7986_uart2_0_funcs[] = { 4, 4, 4, 4, }; -static int mt7986_spi0_pins[] = { 33, 34, 35, 36, }; -static int mt7986_spi0_funcs[] = { 1, 1, 1, 1, }; +static const int mt7986_spi0_pins[] = { 33, 34, 35, 36, }; +static const int mt7986_spi0_funcs[] = { 1, 1, 1, 1, }; -static int mt7986_spi0_wp_hold_pins[] = { 37, 38, }; -static int mt7986_spi0_wp_hold_funcs[] = { 1, 1, }; +static const int mt7986_spi0_wp_hold_pins[] = { 37, 38, }; +static const int mt7986_spi0_wp_hold_funcs[] = { 1, 1, }; -static int mt7986_uart2_1_pins[] = { 33, 34, 35, 36, }; -static int mt7986_uart2_1_funcs[] = { 3, 3, 3, 3, }; +static const int mt7986_uart2_1_pins[] = { 33, 34, 35, 36, }; +static const int mt7986_uart2_1_funcs[] = { 3, 3, 3, 3, }; -static int mt7986_uart1_3_rx_tx_pins[] = { 35, 36, }; -static int mt7986_uart1_3_rx_tx_funcs[] = { 2, 2, }; +static const int mt7986_uart1_3_rx_tx_pins[] = { 35, 36, }; +static const int mt7986_uart1_3_rx_tx_funcs[] = { 2, 2, }; -static int mt7986_uart1_3_cts_rts_pins[] = { 37, 38, }; -static int mt7986_uart1_3_cts_rts_funcs[] = { 2, 2, }; +static const int mt7986_uart1_3_cts_rts_pins[] = { 37, 38, }; +static const int mt7986_uart1_3_cts_rts_funcs[] = { 2, 2, }; -static int mt7986_spi1_3_pins[] = { 33, 34, 35, 36, }; -static int mt7986_spi1_3_funcs[] = { 4, 4, 4, 4, }; +static const int mt7986_spi1_3_pins[] = { 33, 34, 35, 36, }; +static const int mt7986_spi1_3_funcs[] = { 4, 4, 4, 4, }; -static int mt7986_uart0_pins[] = { 39, 40, }; -static int mt7986_uart0_funcs[] = { 1, 1, }; +static const int mt7986_uart0_pins[] = { 39, 40, }; +static const int mt7986_uart0_funcs[] = { 1, 1, }; -static int mt7986_pcie_reset_pins[] = { 41, }; -static int mt7986_pcie_reset_funcs[] = { 1, }; +static const int mt7986_pcie_reset_pins[] = { 41, }; +static const int mt7986_pcie_reset_funcs[] = { 1, }; -static int mt7986_uart1_pins[] = { 42, 43, 44, 45, }; -static int mt7986_uart1_funcs[] = { 1, 1, 1, 1, }; +static const int mt7986_uart1_pins[] = { 42, 43, 44, 45, }; +static const int mt7986_uart1_funcs[] = { 1, 1, 1, 1, }; -static int mt7986_uart2_pins[] = { 46, 47, 48, 49, }; -static int mt7986_uart2_funcs[] = { 1, 1, 1, 1, }; +static const int mt7986_uart2_pins[] = { 46, 47, 48, 49, }; +static const int mt7986_uart2_funcs[] = { 1, 1, 1, 1, }; -static int mt7986_emmc_51_pins[] = { +static const int mt7986_emmc_51_pins[] = { 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, }; -static int mt7986_emmc_51_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; +static const int mt7986_emmc_51_funcs[] = { + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; -static int mt7986_pcm_pins[] = { 62, 63, 64, 65, }; -static int mt7986_pcm_funcs[] = { 1, 1, 1, 1, }; +static const int mt7986_pcm_pins[] = { 62, 63, 64, 65, }; +static const int mt7986_pcm_funcs[] = { 1, 1, 1, 1, }; -static int mt7986_i2s_pins[] = { 62, 63, 64, 65, }; -static int mt7986_i2s_funcs[] = { 1, 1, 1, 1, }; +static const int mt7986_i2s_pins[] = { 62, 63, 64, 65, }; +static const int mt7986_i2s_funcs[] = { 1, 1, 1, 1, }; -static int mt7986_switch_int_pins[] = { 66, }; -static int mt7986_switch_int_funcs[] = { 1, }; +static const int mt7986_switch_int_pins[] = { 66, }; +static const int mt7986_switch_int_funcs[] = { 1, }; -static int mt7986_mdc_mdio_pins[] = { 67, 68, }; -static int mt7986_mdc_mdio_funcs[] = { 1, 1, }; +static const int mt7986_mdc_mdio_pins[] = { 67, 68, }; +static const int mt7986_mdc_mdio_funcs[] = { 1, 1, }; -static int mt7986_wf_2g_pins[] = {74, 75, 76, 77, 78, 79, 80, 81, 82, 83, }; -static int mt7986_wf_2g_funcs[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; +static const int mt7986_wf_2g_pins[] = { + 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, }; +static const int mt7986_wf_2g_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; -static int mt7986_wf_5g_pins[] = {91, 92, 93, 94, 95, 96, 97, 98, 99, 100, }; -static int mt7986_wf_5g_funcs[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; +static const int mt7986_wf_5g_pins[] = { + 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, }; +static const int mt7986_wf_5g_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; -static int mt7986_wf_dbdc_pins[] = { +static const int mt7986_wf_dbdc_pins[] = { 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, }; -static int mt7986_wf_dbdc_funcs[] = { +static const int mt7986_wf_dbdc_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; -static int mt7986_pcie_clk_pins[] = { 9, }; -static int mt7986_pcie_clk_funcs[] = { 1, }; +static const int mt7986_pcie_clk_pins[] = { 9, }; +static const int mt7986_pcie_clk_funcs[] = { 1, }; -static int mt7986_pcie_wake_pins[] = { 10, }; -static int mt7986_pcie_wake_funcs[] = { 1, }; +static const int mt7986_pcie_wake_pins[] = { 10, }; +static const int mt7986_pcie_wake_funcs[] = { 1, }; static const struct mtk_group_desc mt7986_groups[] = { PINCTRL_PIN_GROUP("watchdog", mt7986_watchdog), @@ -738,7 +741,7 @@ static const struct mtk_function_desc mt7986_functions[] = { {"wifi", mt7986_wf_groups, ARRAY_SIZE(mt7986_wf_groups)}, }; -static struct mtk_pinctrl_soc mt7986_data = { +static const struct mtk_pinctrl_soc mt7986_data = { .name = "mt7986_pinctrl", .reg_cal = mt7986_reg_cals, .pins = mt7986_pins, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8512.c b/drivers/pinctrl/mediatek/pinctrl-mt8512.c index 3d9c0ab..bc5fb83 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8512.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8512.c @@ -315,12 +315,12 @@ static const struct mtk_pin_desc mt8512_pins[] = { */ /* UART */ -static int mt8512_uart0_0_rxd_txd_pins[] = { 52, 53, }; -static int mt8512_uart0_0_rxd_txd_funcs[] = { 1, 1, }; -static int mt8512_uart1_0_rxd_txd_pins[] = { 54, 55, }; -static int mt8512_uart1_0_rxd_txd_funcs[] = { 1, 1, }; -static int mt8512_uart2_0_rxd_txd_pins[] = { 28, 29, }; -static int mt8512_uart2_0_rxd_txd_funcs[] = { 1, 1, }; +static const int mt8512_uart0_0_rxd_txd_pins[] = { 52, 53, }; +static const int mt8512_uart0_0_rxd_txd_funcs[] = { 1, 1, }; +static const int mt8512_uart1_0_rxd_txd_pins[] = { 54, 55, }; +static const int mt8512_uart1_0_rxd_txd_funcs[] = { 1, 1, }; +static const int mt8512_uart2_0_rxd_txd_pins[] = { 28, 29, }; +static const int mt8512_uart2_0_rxd_txd_funcs[] = { 1, 1, }; /* Joint those groups owning the same capability in user point of view which * allows that people tend to use through the device tree. @@ -330,13 +330,13 @@ static const char *const mt8512_uart_groups[] = { "uart0_0_rxd_txd", "uart2_0_rxd_txd", }; /* SNAND */ -static int mt8512_snfi_pins[] = { 71, 76, 77, 78, 79, 80, }; -static int mt8512_snfi_funcs[] = { 3, 3, 3, 3, 3, 3, }; +static const int mt8512_snfi_pins[] = { 71, 76, 77, 78, 79, 80, }; +static const int mt8512_snfi_funcs[] = { 3, 3, 3, 3, 3, 3, }; /* MMC0 */ -static int mt8512_msdc0_pins[] = { 76, 77, 78, 79, 80, 81, 82, 83, 84, - 85, 86, }; -static int mt8512_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; +static const int mt8512_msdc0_pins[] = { 76, 77, 78, 79, 80, 81, 82, 83, 84, + 85, 86, }; +static const int mt8512_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; static const struct mtk_group_desc mt8512_groups[] = { PINCTRL_PIN_GROUP("uart0_0_rxd_txd", mt8512_uart0_0_rxd_txd), @@ -356,7 +356,7 @@ static const struct mtk_function_desc mt8512_functions[] = { {"snand", mt8512_msdc_groups, ARRAY_SIZE(mt8512_msdc_groups)}, }; -static struct mtk_pinctrl_soc mt8512_data = { +static const struct mtk_pinctrl_soc mt8512_data = { .name = "mt8512_pinctrl", .reg_cal = mt8512_reg_cals, .pins = mt8512_pins, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8516.c b/drivers/pinctrl/mediatek/pinctrl-mt8516.c index 6f94f76..7487d6f 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8516.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8516.c @@ -326,12 +326,12 @@ static const struct mtk_pin_desc mt8516_pins[] = { */ /* UART */ -static int mt8516_uart0_0_rxd_txd_pins[] = { 62, 63, }; -static int mt8516_uart0_0_rxd_txd_funcs[] = { 1, 1, }; -static int mt8516_uart1_0_rxd_txd_pins[] = { 64, 65, }; -static int mt8516_uart1_0_rxd_txd_funcs[] = { 1, 1, }; -static int mt8516_uart2_0_rxd_txd_pins[] = { 34, 35, }; -static int mt8516_uart2_0_rxd_txd_funcs[] = { 1, 1, }; +static const int mt8516_uart0_0_rxd_txd_pins[] = { 62, 63, }; +static const int mt8516_uart0_0_rxd_txd_funcs[] = { 1, 1, }; +static const int mt8516_uart1_0_rxd_txd_pins[] = { 64, 65, }; +static const int mt8516_uart1_0_rxd_txd_funcs[] = { 1, 1, }; +static const int mt8516_uart2_0_rxd_txd_pins[] = { 34, 35, }; +static const int mt8516_uart2_0_rxd_txd_funcs[] = { 1, 1, }; /* Joint those groups owning the same capability in user point of view which * allows that people tend to use through the device tree. @@ -341,9 +341,9 @@ static const char *const mt8516_uart_groups[] = { "uart0_0_rxd_txd", "uart2_0_rxd_txd", }; /* MMC0 */ -static int mt8516_msdc0_pins[] = { 110, 111, 112, 113, 114, 115, 116, 117, 118, - 119, 120, }; -static int mt8516_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; +static const int mt8516_msdc0_pins[] = { 110, 111, 112, 113, 114, 115, 116, 117, + 118, 119, 120, }; +static const int mt8516_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; static const struct mtk_group_desc mt8516_groups[] = { PINCTRL_PIN_GROUP("uart0_0_rxd_txd", mt8516_uart0_0_rxd_txd), diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8518.c b/drivers/pinctrl/mediatek/pinctrl-mt8518.c index ed51bd3..66fcfdf 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8518.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8518.c @@ -346,12 +346,12 @@ static const struct mtk_pin_desc mt8518_pins[] = { */ /* UART */ -static int mt8518_uart0_0_rxd_txd_pins[] = { 104, 105, }; -static int mt8518_uart0_0_rxd_txd_funcs[] = { 1, 1, }; -static int mt8518_uart1_0_rxd_txd_pins[] = { 52, 53, }; -static int mt8518_uart1_0_rxd_txd_funcs[] = { 1, 1, }; -static int mt8518_uart2_0_rxd_txd_pins[] = { 106, 107, }; -static int mt8518_uart2_0_rxd_txd_funcs[] = { 1, 1, }; +static const int mt8518_uart0_0_rxd_txd_pins[] = { 104, 105, }; +static const int mt8518_uart0_0_rxd_txd_funcs[] = { 1, 1, }; +static const int mt8518_uart1_0_rxd_txd_pins[] = { 52, 53, }; +static const int mt8518_uart1_0_rxd_txd_funcs[] = { 1, 1, }; +static const int mt8518_uart2_0_rxd_txd_pins[] = { 106, 107, }; +static const int mt8518_uart2_0_rxd_txd_funcs[] = { 1, 1, }; /* Joint those groups owning the same capability in user point of view which * allows that people tend to use through the device tree. @@ -361,9 +361,9 @@ static const char *const mt8518_uart_groups[] = { "uart0_0_rxd_txd", "uart2_0_rxd_txd", }; /* MMC0 */ -static int mt8518_msdc0_pins[] = { 3, 4, 5, 6, 7, 8, 9, 10, 11, - 12, 13, }; -static int mt8518_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; +static const int mt8518_msdc0_pins[] = { 3, 4, 5, 6, 7, 8, 9, 10, 11, + 12, 13, }; +static const int mt8518_msdc0_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; static const struct mtk_group_desc mt8518_groups[] = { PINCTRL_PIN_GROUP("uart0_0_rxd_txd", mt8518_uart0_0_rxd_txd), @@ -380,7 +380,7 @@ static const struct mtk_function_desc mt8518_functions[] = { {"msdc", mt8518_msdc_groups, ARRAY_SIZE(mt8518_msdc_groups)}, }; -static struct mtk_pinctrl_soc mt8518_data = { +static const struct mtk_pinctrl_soc mt8518_data = { .name = "mt8518_pinctrl", .reg_cal = mt8518_reg_cals, .pins = mt8518_pins, diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c index 5a4d58b..1caca34 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c @@ -314,7 +314,7 @@ static int mtk_pinmux_group_set(struct udevice *dev, int i; for (i = 0; i < grp->num_pins; i++) { - int *pin_modes = grp->data; + const int *pin_modes = grp->data; mtk_hw_set_value(dev, grp->pins[i], PINCTRL_PIN_REG_MODE, pin_modes[i]); @@ -769,7 +769,7 @@ static int mtk_gpiochip_register(struct udevice *parent) #endif int mtk_pinctrl_common_probe(struct udevice *dev, - struct mtk_pinctrl_soc *soc) + const struct mtk_pinctrl_soc *soc) { struct mtk_pinctrl_priv *priv = dev_get_priv(dev); int ret = 0; diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h index 0d9596f..c948b80 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h @@ -174,9 +174,9 @@ struct mtk_pin_desc { */ struct mtk_group_desc { const char *name; - int *pins; + const int *pins; int num_pins; - void *data; + const void *data; }; /** @@ -233,7 +233,7 @@ struct mtk_pinctrl_soc { */ struct mtk_pinctrl_priv { void __iomem *base[MAX_BASE_CALC]; - struct mtk_pinctrl_soc *soc; + const struct mtk_pinctrl_soc *soc; }; extern const struct pinctrl_ops mtk_pinctrl_ops; @@ -242,7 +242,7 @@ extern const struct pinctrl_ops mtk_pinctrl_ops; void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set); void mtk_i_rmw(struct udevice *dev, u8 i, u32 reg, u32 mask, u32 set); int mtk_pinctrl_common_probe(struct udevice *dev, - struct mtk_pinctrl_soc *soc); + const struct mtk_pinctrl_soc *soc); #if CONFIG_IS_ENABLED(PINCONF) |