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author | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-02-06 16:10:44 +0800 |
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committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-02-17 19:07:48 +0800 |
commit | 55ca747f66742d15829f8706a633849d9013bab5 (patch) | |
tree | 3340b10e62e06498421b39c15946c97a3dd6b477 /drivers | |
parent | daf1312b07208f231a5b27a7edecca5a7d50196b (diff) | |
download | u-boot-55ca747f66742d15829f8706a633849d9013bab5.zip u-boot-55ca747f66742d15829f8706a633849d9013bab5.tar.gz u-boot-55ca747f66742d15829f8706a633849d9013bab5.tar.bz2 |
riscv: Remove redundant Kconfig "RISCV_NDS_CACHE"
There is no need for RISCV_NDS_CACHE config to control cache switches.
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/cache/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig index 40f41a8..6cb8c3e 100644 --- a/drivers/cache/Kconfig +++ b/drivers/cache/Kconfig @@ -25,7 +25,6 @@ config L2X0_CACHE config V5L2_CACHE bool "Andes V5L2 cache driver" select CACHE - depends on RISCV_NDS_CACHE help Support Andes V5L2 cache controller in AE350 platform. It will configure tag and data ram timing control from the |