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| author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-07-05 12:11:58 +0200 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-08-13 17:12:32 +0200 |
| commit | 4e4c40df3065df285e3bf60460ade2adbaabce22 (patch) | |
| tree | d1782153823519a04159647073577c8cc0779a11 /drivers | |
| parent | df0ae00041c62709917ad600999fd2945dc69426 (diff) | |
| download | u-boot-4e4c40df3065df285e3bf60460ade2adbaabce22.zip u-boot-4e4c40df3065df285e3bf60460ade2adbaabce22.tar.gz u-boot-4e4c40df3065df285e3bf60460ade2adbaabce22.tar.bz2 | |
rockchip: clk: rk3368: mark 'priv' __maybe_unused in rk3368_clk_set_rate()
With the clock support in rk3368_clk_set_rate() conditionalized on
various feature definitions, 'priv' can remain unused (e.g. in the
SPL build when only MMC is enabled).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/rockchip/clk_rk3368.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c index 2b6c8da..d3f6c29 100644 --- a/drivers/clk/rockchip/clk_rk3368.c +++ b/drivers/clk/rockchip/clk_rk3368.c @@ -353,7 +353,7 @@ static ulong rk3368_gmac_set_clk(struct rk3368_cru *cru, static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate) { - struct rk3368_clk_priv *priv = dev_get_priv(clk->dev); + __maybe_unused struct rk3368_clk_priv *priv = dev_get_priv(clk->dev); ulong ret = 0; debug("%s id:%ld rate:%ld\n", __func__, clk->id, rate); |