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| author | Johan Jonker <jbx6244@gmail.com> | 2023-03-15 19:34:13 +0100 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2023-04-21 15:16:01 +0800 |
| commit | 2c2d782556e4f5d9483679d1293d8436892e9fed (patch) | |
| tree | 99c788612a478013663757bc435b9985f2e5bb54 /drivers | |
| parent | 7c1ee7a8488386e827c274d86297af415e49c02a (diff) | |
| download | u-boot-2c2d782556e4f5d9483679d1293d8436892e9fed.zip u-boot-2c2d782556e4f5d9483679d1293d8436892e9fed.tar.gz u-boot-2c2d782556e4f5d9483679d1293d8436892e9fed.tar.bz2 | |
clk: rockchip: clk_rk3288: add PCLK_RKPWM
The rk3288 pwm nodes synced from Linux make use of PCLK_RKPWM
instead of PCLK_PWM. They have the same pclk_cpu parent,
so add PCLK_RKPWM to rk3288_clk_get_rate().
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook-jerry
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/rockchip/clk_rk3288.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index 3b29992..ef744c0 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -778,6 +778,7 @@ static ulong rk3288_clk_get_rate(struct clk *clk) case PCLK_I2C5: return gclk_rate; case PCLK_PWM: + case PCLK_RKPWM: return PD_BUS_PCLK_HZ; case SCLK_SARADC: new_rate = rockchip_saradc_get_clk(priv->cru); |