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| author | Grygorii Strashko <grygorii.strashko@ti.com> | 2019-11-18 23:04:45 +0200 |
|---|---|---|
| committer | Joe Hershberger <joe.hershberger@ni.com> | 2019-12-09 09:47:42 -0600 |
| commit | 253a5ff8712c4dc5821ebdc4e4124901d37c0339 (patch) | |
| tree | 456570d03b647fa213e0526df801fcd0b4f3f3f8 /drivers | |
| parent | 20f7ea4c35ff98003c29eec442700af04496b49f (diff) | |
| download | u-boot-253a5ff8712c4dc5821ebdc4e4124901d37c0339.zip u-boot-253a5ff8712c4dc5821ebdc4e4124901d37c0339.tar.gz u-boot-253a5ff8712c4dc5821ebdc4e4124901d37c0339.tar.bz2 | |
net: phy: dp83867: io impedance is not dependent on RGMII delay
Based on commit 27708eb5481b ("net: phy: dp83867: IO impedance is not
dependent on RGMII delay") of mainline linux kernel.
The driver would only set the IO impedance value when RGMII internal delays
were enabled. There is no reason for this. Move the IO impedance block
out of the RGMII delay block.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/phy/dp83867.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index 1721f68..f9bb925 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -351,17 +351,17 @@ static int dp83867_config(struct phy_device *phydev) phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIIDCTL, delay); + } - if (dp83867->io_impedance >= 0) { - val = phy_read_mmd(phydev, - DP83867_DEVADDR, - DP83867_IO_MUX_CFG); - val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL; - val |= dp83867->io_impedance & - DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL; - phy_write_mmd(phydev, DP83867_DEVADDR, - DP83867_IO_MUX_CFG, val); - } + if (dp83867->io_impedance >= 0) { + val = phy_read_mmd(phydev, + DP83867_DEVADDR, + DP83867_IO_MUX_CFG); + val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL; + val |= dp83867->io_impedance & + DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL; + phy_write_mmd(phydev, DP83867_DEVADDR, + DP83867_IO_MUX_CFG, val); } if (dp83867->port_mirroring != DP83867_PORT_MIRRORING_KEEP) |