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author | Faiz Abbas <faiz_abbas@ti.com> | 2019-10-15 18:24:38 +0530 |
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committer | Tom Rini <trini@konsulko.com> | 2019-10-23 20:47:12 -0400 |
commit | 4390eaf67630ed0cff1ed069d73a243c145c2aa5 (patch) | |
tree | dc0624e915e8062868f32c2a2f82c1b50902d30f /drivers/ufs | |
parent | ef5fb5a84cd7d09fe577f6664885df14310861e9 (diff) | |
download | u-boot-4390eaf67630ed0cff1ed069d73a243c145c2aa5.zip u-boot-4390eaf67630ed0cff1ed069d73a243c145c2aa5.tar.gz u-boot-4390eaf67630ed0cff1ed069d73a243c145c2aa5.tar.bz2 |
ufs: Add glue layer driver for TI J721E devices
Add glue layer driver for the controller present on TI's J721E devices.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Diffstat (limited to 'drivers/ufs')
-rw-r--r-- | drivers/ufs/Kconfig | 6 | ||||
-rw-r--r-- | drivers/ufs/Makefile | 1 | ||||
-rw-r--r-- | drivers/ufs/ti-j721e-ufs.c | 71 |
3 files changed, 78 insertions, 0 deletions
diff --git a/drivers/ufs/Kconfig b/drivers/ufs/Kconfig index c272074..c2aafd3 100644 --- a/drivers/ufs/Kconfig +++ b/drivers/ufs/Kconfig @@ -14,4 +14,10 @@ config CADENCE_UFS This selects the platform driver for the Cadence UFS host controller present on present TI's J721e devices. +config TI_J721E_UFS + bool "Glue Layer driver for UFS on TI J721E devices" + help + This selects the glue layer driver for Cadence controller + present on TI's J721E devices. + endmenu diff --git a/drivers/ufs/Makefile b/drivers/ufs/Makefile index 9262bd6..62ed016 100644 --- a/drivers/ufs/Makefile +++ b/drivers/ufs/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_UFS) += ufs.o ufs-uclass.o obj-$(CONFIG_CADENCE_UFS) += cdns-platform.o +obj-$(CONFIG_TI_J721E_UFS) += ti-j721e-ufs.o diff --git a/drivers/ufs/ti-j721e-ufs.c b/drivers/ufs/ti-j721e-ufs.c new file mode 100644 index 0000000..24ec3eb --- /dev/null +++ b/drivers/ufs/ti-j721e-ufs.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + */ + +#include <asm/io.h> +#include <clk.h> +#include <common.h> +#include <dm.h> + +#define UFS_SS_CTRL 0x4 +#define UFS_SS_RST_N_PCS BIT(0) +#define UFS_SS_CLK_26MHZ BIT(4) + +static int ti_j721e_ufs_probe(struct udevice *dev) +{ + void __iomem *base; + unsigned int clock; + struct clk clk; + u32 reg = 0; + int ret; + + ret = clk_get_by_index(dev, 0, &clk); + if (ret) { + dev_err(dev, "failed to get M-PHY clock\n"); + return ret; + } + + clock = clk_get_rate(&clk); + if (IS_ERR_VALUE(clock)) { + dev_err(dev, "failed to get rate\n"); + return ret; + } + + base = dev_remap_addr_index(dev, 0); + + if (clock == 26000000) + reg |= UFS_SS_CLK_26MHZ; + /* Take UFS slave device out of reset */ + reg |= UFS_SS_RST_N_PCS; + writel(reg, base + UFS_SS_CTRL); + + return 0; +} + +static int ti_j721e_ufs_remove(struct udevice *dev) +{ + void __iomem *base = dev_remap_addr_index(dev, 0); + u32 reg = readl(base + UFS_SS_CTRL); + + reg &= ~UFS_SS_RST_N_PCS; + writel(reg, base + UFS_SS_CTRL); + + return 0; +} + +static const struct udevice_id ti_j721e_ufs_ids[] = { + { + .compatible = "ti,j721e-ufs", + }, + {}, +}; + +U_BOOT_DRIVER(ti_j721e_ufs) = { + .name = "ti-j721e-ufs", + .id = UCLASS_MISC, + .of_match = ti_j721e_ufs_ids, + .probe = ti_j721e_ufs_probe, + .remove = ti_j721e_ufs_remove, + .flags = DM_FLAG_OS_PREPARE, +}; |