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| author | Johan Jonker <jbx6244@gmail.com> | 2023-03-13 01:29:47 +0100 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2023-05-06 17:28:18 +0800 |
| commit | e9eddb75c5bf867ac2c773138afb64b92b6100e8 (patch) | |
| tree | 7a1869868665a94fdb4232e4e273479a0081daef /drivers/timer/dw-apb-timer.c | |
| parent | ac9198d1d549b516c7c27f7eaf19dd4a9b5dfbf5 (diff) | |
| download | u-boot-e9eddb75c5bf867ac2c773138afb64b92b6100e8.zip u-boot-e9eddb75c5bf867ac2c773138afb64b92b6100e8.tar.gz u-boot-e9eddb75c5bf867ac2c773138afb64b92b6100e8.tar.bz2 | |
rockchip: timer: dw-apb-timer: use regs variable with uintptr_t size
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use a regs variable with uintptr_t size in the
dw-apb-timer.c file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/timer/dw-apb-timer.c')
| -rw-r--r-- | drivers/timer/dw-apb-timer.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c index 10f0a9f..b171232 100644 --- a/drivers/timer/dw-apb-timer.c +++ b/drivers/timer/dw-apb-timer.c @@ -23,7 +23,7 @@ #define DW_APB_CTRL 0x8 struct dw_apb_timer_priv { - fdt_addr_t regs; + uintptr_t regs; struct reset_ctl_bulk resets; }; |