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author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-06-28 17:51:13 +0200 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-06-28 17:51:13 +0200 |
commit | e6c7f86f03b0ad25e9ef70df3ee1989b6b789d7c (patch) | |
tree | fb7b4ca068bf10217d28af5c33e7a0a9c9961c6a /drivers/spi | |
parent | 9dc8fef2583f23ca6a99c6f5e709a8b80018364f (diff) | |
parent | d6c6d127c5b948ec381fad5b24a2bc5497720644 (diff) | |
download | u-boot-e6c7f86f03b0ad25e9ef70df3ee1989b6b789d7c.zip u-boot-e6c7f86f03b0ad25e9ef70df3ee1989b6b789d7c.tar.gz u-boot-e6c7f86f03b0ad25e9ef70df3ee1989b6b789d7c.tar.bz2 |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Diffstat (limited to 'drivers/spi')
-rw-r--r-- | drivers/spi/mxc_spi.c | 28 |
1 files changed, 11 insertions, 17 deletions
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index 5bed858..0eca776 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -128,8 +128,8 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, unsigned int max_hz, unsigned int mode) { u32 clk_src = mxc_get_clock(MXC_CSPI_CLK); - s32 pre_div = 0, post_div = 0, i, reg_ctrl, reg_config; - u32 ss_pol = 0, sclkpol = 0, sclkpha = 0; + s32 reg_ctrl, reg_config; + u32 ss_pol = 0, sclkpol = 0, sclkpha = 0, pre_div = 0, post_div = 0; struct cspi_regs *regs = (struct cspi_regs *)mxcs->base; if (max_hz == 0) { @@ -147,26 +147,20 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, reg_ctrl |= MXC_CSPICTRL_EN; reg_write(®s->ctrl, reg_ctrl); - /* - * The following computation is taken directly from Freescale's code. - */ if (clk_src > max_hz) { - pre_div = DIV_ROUND_UP(clk_src, max_hz); - if (pre_div > 16) { - post_div = pre_div / 16; - pre_div = 15; - } - if (post_div != 0) { - for (i = 0; i < 16; i++) { - if ((1 << i) >= post_div) - break; - } - if (i == 16) { + pre_div = (clk_src - 1) / max_hz; + /* fls(1) = 1, fls(0x80000000) = 32, fls(16) = 5 */ + post_div = fls(pre_div); + if (post_div > 4) { + post_div -= 4; + if (post_div >= 16) { printf("Error: no divider for the freq: %d\n", max_hz); return -1; } - post_div = i; + pre_div >>= post_div; + } else { + post_div = 0; } } |