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| author | Patrice Chotard <patrice.chotard@st.com> | 2018-12-04 14:11:36 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-12-15 11:49:56 -0500 |
| commit | f828fa4d822b61de624a6e8db288d3778a69ee7a (patch) | |
| tree | 4ee3986080112f2ebe3827ab249756836131cd17 /drivers/serial | |
| parent | 655c6d997d47838229ed2d31a7338dcdffea886a (diff) | |
| download | u-boot-f828fa4d822b61de624a6e8db288d3778a69ee7a.zip u-boot-f828fa4d822b61de624a6e8db288d3778a69ee7a.tar.gz u-boot-f828fa4d822b61de624a6e8db288d3778a69ee7a.tar.bz2 | |
serial: serial_stm32: Add reset support
In some cases, UART is configured by early boot stage.
To be sure of the initial state of UART and to avoid
spurious chars on console, reset the serial block before
configuring it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/serial')
| -rw-r--r-- | drivers/serial/serial_stm32.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c index 31b43ee..e31c87b 100644 --- a/drivers/serial/serial_stm32.c +++ b/drivers/serial/serial_stm32.c @@ -7,6 +7,7 @@ #include <common.h> #include <clk.h> #include <dm.h> +#include <reset.h> #include <serial.h> #include <watchdog.h> #include <asm/io.h> @@ -171,6 +172,7 @@ static int stm32_serial_probe(struct udevice *dev) { struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); struct clk clk; + struct reset_ctl reset; int ret; plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev); @@ -185,6 +187,13 @@ static int stm32_serial_probe(struct udevice *dev) return ret; } + ret = reset_get_by_index(dev, 0, &reset); + if (!ret) { + reset_assert(&reset); + udelay(2); + reset_deassert(&reset); + } + plat->clock_rate = clk_get_rate(&clk); if (plat->clock_rate < 0) { clk_disable(&clk); |